Dynamic Network Buffer Allocation for High-Speed Packet Generation
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Solution Overview
Problem
The existing TCP/IP protocol processing is limited by low memory access speed, making it impossible to generate TCP/IP packets at high speed due to the need for wide memory access, and the cost and chip area limitations restrict the use of sufficient SRAM for high-speed network buffers.
Innovation Solution
A communication apparatus that allocates high-speed buffers to SRAM for connections requiring high-speed communication and general-purpose buffers to DRAM for connections that do not, allowing for dynamic switching based on connection needs and attributes, thereby optimizing memory usage and communication speed.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If SRAM is used as network buffer to improve memory access speed, then packet generation speed is improved, but chip area and cost increase
Solution Approach 1:
The patent divides the network buffer into two segments: high-speed buffer in SRAM for connections requiring high-speed communication, and general-purpose buffer in DRAM for other connections. This segmentation allows the system to use SRAM only where necessary, reducing overall chip area while maintaining high-speed packet generation for critical connections.
Solution Approach 2:
The patent applies local quality by allocating SRAM resources specifically to connections that require high-speed communication, rather than using SRAM for all connections. This targeted approach ensures that high-speed memory is used only where it provides necessary performance benefits, optimizing the balance between speed and area.
2Productivity
If SRAM is used as network buffer to improve packet generation speed, then productivity is improved, but the memory size is limited due to cost and chip area constraints
Solution Approach 1:
The network buffer is segmented into high-speed buffer (SRAM) and general-purpose buffer (DRAM), allowing the system to achieve high packet generation speed for connections that need it while using larger DRAM capacity for other connections, thus overcoming the memory size limitation of SRAM.
Solution Approach 2:
The patent makes the network buffer system multi-functional by allowing it to dynamically allocate between SRAM and DRAM based on connection requirements. This universality enables the system to handle both high-speed and standard-speed connections with a single buffer management mechanism, effectively utilizing available memory resources.
3Reliability
If wide memory access is performed to copy data for TCP/IP packet generation, then complete packet processing is achieved, but communication speed is limited by memory access speed
Solution Approach 1:
The patent applies local quality by performing wide memory access from SRAM only for connections that require high-speed communication, while using DRAM for other connections. This selective approach maintains complete protocol processing reliability while improving communication speed for critical connections where high-speed buffer is allocated.
Data Source
AI summary
A communication apparatus comprises a general-purpose memory, and a high-speed memory that allows higher-speed access than the general-purpose memory. Protocol processing is executed to packetize transmission data using a general-purpose buffer allocated to the general-purpose memory and/or a high-speed buffer allocated to the high-speed memory as network buffers.