Dynamic Packet Bypass for Network Latency Reduction

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Solution Overview

Problem

Network devices with pipeline architectures face latency issues due to each packet processing unit increasing end-to-end processing time, which is problematic for time-sensitive communications like financial transactions where nanosecond or millisecond delays can significantly impact outcomes.

Innovation Solution

Implementing a method where packets can dynamically bypass specific packet processing units based on a bypass indicator, allowing packets to skip certain processing operations while still undergoing others, thereby reducing overall latency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If packets are processed through all packet processing units in the pipeline, then processing completeness and reliability are improved, but end-to-end latency increases

Engineering Contradiction:
Improveprocessing completenessVSAvoidend-to-end latency
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent implements dynamic bypass capabilities where packet processing units can be selectively activated or deactivated based on packet characteristics, flow identifiers, or processing requirements. This allows the system to adaptively adjust the processing path for different packets, bypassing unnecessary units while ensuring required processing is performed, thus resolving the contradiction between processing completeness and latency reduction.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent applies different processing treatments to different packets or packet flows by implementing per-flow or per-packet bypass indicators. Each packet can be routed through a customized subset of processing units based on its specific requirements, allowing critical packets to receive full processing while non-critical packets bypass unnecessary units, thereby maintaining reliability where needed while reducing overall latency.

Inventive Principle:
Principle #3Local quality

2Loss of time

If packets bypass certain packet processing units, then latency is reduced, but processing completeness may be compromised

Engineering Contradiction:
Improvetransmission latencyVSAvoidprocessing completeness
Core Design Contradiction:
Loss of timeVSReliability

Solution Approach 1:

The system dynamically determines which packets should bypass which processing units based on real-time conditions, packet priorities, and processing requirements. This dynamic control ensures that packets bypass only those units whose processing is non-essential, while maintaining complete processing for packets that require it, thus reducing latency without compromising necessary processing completeness.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent implements feedback mechanisms where processing units and control logic monitor packet characteristics, processing status, and system conditions to make informed decisions about bypass operations. This feedback ensures that bypass decisions are made intelligently based on actual processing needs, preventing unnecessary processing while ensuring critical processing is not omitted, thereby maintaining reliability while reducing latency.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS10122735B1Switch having dynamic bypass per flow
Publication Date: 2018.11.06 MARVELL ISRAEL (M L S L) LTD
  • US10122735B1 patent drawing
  • US10122735B1 patent drawing
  • US10122735B1 patent drawing

AI summary

In a method for processing packets in one or more network devices, a first packet is received at the one or more network devices, the first packet being associated with a first bypass indicator. Based at least in part on the first bypass indicator, the first packet, a portion of the first packet, or a packet descriptor associated with the first packet is caused to bypass at least a portion of a first packet processing unit among a plurality of processing units of the one or more network devices, each processing unit being configured to perform a packet processing operation, and not to bypass at least a portion of a second packet processing unit among the plurality of processing units of the one or more network devices.