Dynamic Page Mapping for NAND Flash Memory Write Cycle Reduction
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Solution Overview
Problem
NAND-based flash memory devices face inefficiencies due to static page mapping, requiring entire block rewriting for single page updates, leading to a finite number of write cycles and low write efficiency, especially for small files.
Innovation Solution
Implementing a dynamic page mapping scheme within blocks using a look-up table to translate logical page numbers into physical page numbers, reserving pages for data shuffling within blocks, reducing the need for unnecessary write cycles by allowing data migration within blocks without rewriting entire contents.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If static page mapping is used in NAND flash memory, then data can be written to specific page addresses, but the entire block must be rewritten when updating a single page, leading to low write efficiency
Solution Approach 1:
The patent implements dynamic page mapping where the mapping between logical page addresses and physical page addresses is not fixed but can change over time. The controller maintains a mapping table that dynamically assigns different physical pages to the same logical page address across different blocks, allowing selective updating of only the modified page rather than rewriting the entire block.
Solution Approach 2:
The patent introduces a mapping table as an intermediary layer between logical page addresses and physical page addresses. This mapping table acts as a mediator that translates logical addresses to physical addresses, enabling the system to locate and update only the specific page that needs modification without affecting other pages in the block.
2Reliability
If entire block rewriting is performed for single page updates, then data integrity is maintained, but the number of write cycles increases, reducing device endurance
Solution Approach 1:
The patent extracts the specific page that needs updating from the entire block and updates only that individual page. By identifying and isolating the modified page through dynamic mapping, the system performs write operations on a smaller subset of data (single page rather than entire block), thereby reducing wear on the flash memory cells while maintaining data integrity.
Solution Approach 2:
The patent applies local quality by treating each page within a block differently based on its update status. Instead of uniformly rewriting the entire block, the system identifies the specific local region (page) that requires updating and applies write operations only to that localized area, preserving unchanged pages and reducing overall write cycle count.
3Ease of operation
If block erasure is performed before rewriting, then the block is ready for new data, but small file updates require excessive erase and write cycles
Solution Approach 1:
The patent performs preliminary action by pre-establishing the mapping between logical and physical page addresses before write operations occur. The mapping table is maintained and updated in advance, allowing the controller to directly locate available pages for writing without requiring erasure of the entire block first. This preliminary mapping setup enables efficient small file updates by directing writes to pre-identified valid pages.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach significantly reduces the number of erase/write cycles, increases block utilization, and extends the endurance of NAND flash memory devices by allowing efficient data management and proactive scheduling of 'dirty' blocks for erasure.
Implementation Method 1
a look-up table for translating logical page numbers into physical page numbers
Implementation Method 2
Solid state drives comprising NAND-based flash memory
Data Source
AI summary
A NAND-based flash memory device and a method of its operation that extends the life of the device by reducing the number of unnecessary write cycles to the device. The memory device includes blocks, pages contained by each of the blocks, and a page abstraction layer containing a look-up table for translating logical page numbers into physical page numbers. A certain number of the pages in at least one of the blocks is preferably reserved so as not to be used in default data storage mode but instead used to shuffle data within the at least one block using a dynamic page address scheme, whereby data are dynamically moved from one page to an empty page in the same block using dynamic page mapping.