Dynamic Parity Scheme for Memory Reliability

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Solution Overview

Problem

Existing memory systems face challenges in dynamically adjusting the reliability and capacity of data storage as the memory device's lifecycle progresses, leading to decreased data retention characteristics over time.

Innovation Solution

The memory system dynamically configures the quantity of pages in each block of memory cells that store parity information based on conditions such as access operations and error detection, thereby adjusting the reliability and capacity of data storage in response to changing conditions.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a fixed quantity of pages store parity information throughout the memory device's lifecycle, then the data storage capacity remains constant, but data reliability decreases over time as the memory device ages

Engineering Contradiction:
Improvedata reliabilityVSAvoiddata storage capacity
Core Design Contradiction:
ReliabilityVSQuantity of substance

Solution Approach 1:

The patent implements a dynamic parity scheme where the quantity of pages storing parity information is adjusted over time based on the memory device's lifecycle and observed error rates. The system transitions from a static configuration to a dynamic one, increasing parity pages when errors are detected and decreasing them when the device is reliable, thereby resolving the contradiction between maintaining high reliability and preserving storage capacity.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The system changes the parameter of parity page quantity based on operational conditions. By monitoring error rates and device age, the system adjusts the number of parity pages dynamically, allowing the same physical memory to provide different levels of protection at different times, thus balancing reliability and capacity throughout the device's lifecycle.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If more pages are allocated to store parity information, then data reliability improves, but data storage capacity decreases

Engineering Contradiction:
Improvedata reliabilityVSAvoiddata storage capacity
Core Design Contradiction:
ReliabilityVSQuantity of substance

Solution Approach 1:

Rather than allocating a fixed number of parity pages, the system dynamically adjusts the quantity of parity pages based on actual device performance and error rates. This allows the system to use more parity pages only when necessary (when errors are detected), and conserve storage capacity when the device is operating reliably, thus resolving the trade-off between reliability and capacity.

Inventive Principle:
Principle #15Dynamics

3Quantity of substance

If fewer pages are allocated to store parity information, then data storage capacity increases, but data reliability decreases

Engineering Contradiction:
Improvedata storage capacityVSAvoiddata reliability
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

The system changes the parity page quantity parameter dynamically rather than using a fixed allocation. This allows the system to maximize storage capacity during periods of high reliability while automatically increasing parity protection when errors are detected, thus achieving both high capacity and high reliability at different times in the device's operation.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS12339744B2Dynamic parity scheme
Publication Date: 2025.06.24 MICRON TECHNOLOGY INC
  • US12339744B2 patent drawing
  • US12339744B2 patent drawing
  • US12339744B2 patent drawing

AI summary

Methods, systems, and devices for a dynamic parity scheme are described. A memory system may include a memory device with multiple blocks of memory cells, where each block includes a first quantity of pages of memory cells storing data and a second quantity of pages of memory cells storing parity information associated with the data. In some cases, the memory system may increase the quantity of pages in a block of memory cells storing parity information to improve a reliability of the data stored in the block of memory cells. For example, the memory system may increase the quantity of pages storing parity information at the block of memory cells after performing a threshold quantity of access operations at the block of memory cells or in response to detecting more than a threshold quantity of errors in data stored at the block of memory cells.