Dynamic Pass Voltage Adjustment for Flash Memory Sense Operations

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Solution Overview

Problem

Flash memory devices experience undesirable short channel effects, such as punch through and drain-induced barrier lowering, due to reduced effective channel length, which affect memory cell performance and memory density, and existing corrective read methods fail to compensate for floating gate-to-floating gate coupling variations.

Innovation Solution

Implementing dynamic pass voltage adjustment during sense operations by varying the pass voltage based on the program status of adjacent memory cells, using higher voltages for programmed cells and lower voltages for erased cells to maintain effective channel length and reduce short channel effects.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If the channel length is shortened to increase memory density, then memory density is improved, but short channel effects such as punch through and DIBL worsen

Engineering Contradiction:
Improvememory densityVSAvoidshort channel effects
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

The patent dynamically changes the pass voltage parameter during the read operation based on the program status of adjacent memory cells. When adjacent cells are erased, a lower pass voltage is applied to lengthen the effective channel length and reduce short channel effects like punch through and DIBL, while maintaining high memory density with physically short channels.

Inventive Principle:
Principle #35Parameter changes

2Productivity

If the effective channel length is shortened, then memory cell performance is improved for higher density, but punch through and DIBL effects increase

Engineering Contradiction:
Improvememory cell performanceVSAvoidpunch through and DIBL effects
Core Design Contradiction:
ProductivityVSObject-affected harmful factors

Solution Approach 1:

The patent implements dynamic adjustment of the pass voltage during the read operation rather than using a fixed voltage. The pass voltage is changed based on real-time detection of adjacent memory cell program status, allowing the effective channel length to be dynamically optimized to reduce punch through and DIBL effects while maintaining high productivity.

Inventive Principle:
Principle #15Dynamics

3Reliability

If corrective read operation is used to reduce short channel effects, then punch through and DIBL are reduced, but floating gate-to-floating gate coupling variations are not compensated

Engineering Contradiction:
Improveshort channel effects reductionVSAvoidfloating gate coupling compensation
Core Design Contradiction:
ReliabilityVSMeasurement precision

Solution Approach 1:

The patent uses feedback by detecting the program status of adjacent memory cells and using this information to dynamically adjust the pass voltage during the read operation of the target memory cell. This feedback mechanism compensates for floating gate-to-floating gate coupling variations caused by erased adjacent cells, improving measurement precision while maintaining reliability.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS8144516B2Dynamic pass voltage for sense operation in a memory device
Publication Date: 2012.03.27 MICRON TECHNOLOGY INC
  • US8144516B2 patent drawing
  • US8144516B2 patent drawing
  • US8144516B2 patent drawing

AI summary

Methods for sensing and memory devices are disclosed. One such method for sensing uses a dynamic pass voltage on at least one adjacent memory cell that is adjacent to a selected memory cell for programming. If the adjacent memory cell is not programmed, the pass voltage is reduced on the adjacent memory cell. The adjacent memory cell can be on the drain side, the source side, or both drain and source sides of the selected memory cell.