Dynamic Pipeline Architecture for Iterative Data Processing

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Solution Overview

Problem

Existing data processing systems face challenges in achieving high throughput with iterative algorithms due to limitations in logic resources, particularly with conventional parallel and serial pipeline techniques that lead to high fan-out issues and resource consumption.

Innovation Solution

A pipeline architecture with dynamically controlled loops, where data is processed through multiple stages in series, with each stage capable of iterative processing based on an iteration count, allowing for flexible and efficient data propagation without the need for extensive communication buses or large logic resources.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If parallel logic blocks are used to process data simultaneously, then data processing throughput is improved, but fan-out problems and communication bus requirements increase

Engineering Contradiction:
Improvedata processing throughputVSAvoidfan-out and communication bus requirements
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent segments the iterative processing into multiple pipeline stages, where each stage performs a portion of the iteration. This segmentation allows data to be processed in smaller chunks through dedicated stages rather than requiring all processing blocks to operate in parallel, thereby reducing fan-out and communication bus requirements while maintaining throughput.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent transitions from a purely parallel processing dimension to a multi-dimensional approach by introducing pipeline stages that process data sequentially through different iterations. This dimensional change allows the system to achieve parallel throughput benefits without the corresponding parallel fan-out complexity.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Productivity

If serial pipeline techniques are used to increase throughput, then data processing speed is improved, but logic resource consumption increases

Engineering Contradiction:
Improvedata processing throughputVSAvoidlogic resources
Core Design Contradiction:
ProductivityVSQuantity of substance

Solution Approach 1:

The patent creates pipeline stages that are universally applicable across multiple iterations of processing. Each stage can handle different data items through different iterations, making the logic resources multi-functional rather than requiring dedicated resources for each parallel processing path, thus reducing overall logic resource consumption.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent maintains continuous useful action by keeping pipeline stages actively processing data through multiple iterations. Rather than completing one full iteration before starting the next, the pipeline continuously processes different data items at different iteration points, maximizing the utilization of logic resources without requiring additional resources.

Inventive Principle:
Principle #20Continuity of useful action

Data Source

PatentUS9529599B2Dynamic propagation with iterative pipeline processing
Publication Date: 2016.12.27 ANDERSON WILLIAM ERIK
  • US9529599B2 patent drawing
  • US9529599B2 patent drawing
  • US9529599B2 patent drawing

AI summary

Systems, apparatuses, methods, and software for processing data in pipeline architectures are provided herein. In one example, a pipeline architecture is presented. The pipeline architecture includes a plurality of processing stages, linked in series, that iteratively process data as the data propagates through the plurality of processing stages. The pipeline architecture includes at least one other processing stage linked in series with and preceded by the plurality of processing stages and configured to iteratively process the data a number of times based at least on an iteration count comprising how many times the data was iteratively processed as the data propagated through the plurality of processing stages.