Dynamic Pixel Overlay for Chip-to-Substrate Misalignment Repair
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Solution Overview
Problem
Conventional methods for correcting misalignment between integrated semiconductor modules and substrate designs are limited by a fixed set of correction masks, which cannot accommodate the increasing precision required with higher node density in chip packages.
Innovation Solution
A machine learning model is trained on historical and simulated pixel models to determine a transformed pixel model, allowing for maskless digital lithography to connect misaligned chip-groups to design connection points on a substrate, enabling precise corrections without additional correction masks.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If a fixed set of correction masks is used to correct misalignment, then the correction process is simple and manageable, but the manufacturing precision and adaptability deteriorate as node density increases
Solution Approach 1:
The patent transforms the static correction mask system into a dynamic digital correction system. Instead of using fixed physical masks, the system dynamically generates and applies correction patterns through digital lithography tools, allowing real-time adaptation to varying misalignment conditions while maintaining manufacturing precision
Solution Approach 2:
The patent changes the fundamental parameter of correction from fixed physical mask patterns to variable digital pixel models. By modifying the digital representation of connection paths and applying machine learning-based transformations, the system achieves both high precision and adaptability across different node densities
2Adaptability or versatility
If more correction masks are created to cover all possible corrections, then the adaptability improves, but the device complexity and manufacturing cost increase
Solution Approach 1:
The patent replaces the need for multiple physical correction masks with a single digital lithography tool that can generate and apply infinite variation of correction patterns. The digital pixel models serve as virtual copies that can be transformed and applied dynamically, eliminating the complexity of managing numerous physical masks
Solution Approach 2:
The patent creates a universal digital correction system where a single digital lithography tool and set of pixel models can handle all correction needs across different node densities and misalignment scenarios, replacing the need for multiple specialized correction masks
3Manufacturing precision
If digital lithography with ML models is used for maskless correction, then the adaptability and precision improve, but the process complexity increases
Solution Approach 1:
The patent performs preliminary actions by pre-training machine learning models on historical and simulated pixel models before actual correction is needed. This pre-computation and model training phase prepares the system in advance, reducing the complexity during the actual correction process while maintaining high precision
Data Source
AI summary
Systems and methods disclosed are generally related to masklessly developing connections between a chip-group and a design connection point on a substrate. In placement of the chip-group on the substrate, according to certain embodiments the chip-group may be dispositioned relative to an expected position per a substrate layout design, causing a connection misalignment with the design connection point. According to certain embodiments, a machine learning (ML) model is trained on historical and simulated pixel models of chip-group connections and design connection points. Upon determining the chip-group misalignment by a metrology measurement, the trained ML model determines a pixel model to connect the misaligned chip-group, and causes the pixel model to be exposed to a substrate with a digital lithography tool, thereby connecting the dispositioned chip-group to the design connection point.