Dynamic Polling Limit for I/O Command Completion

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Solution Overview

Problem

Existing techniques for checking the completion of I/O commands in computer systems either lead to processor inefficiency due to continuous polling or delayed context switching, as they fail to dynamically adjust to changes in computing load and I/O latencies.

Innovation Solution

A method where a thread or process determines a dynamic polling limit based on recent execution times and current status indicators to control repetitive checking on the completion of I/O commands, allowing the processor to be used efficiently without premature relinquishment in high-latency situations and avoiding missed completions in low-latency scenarios.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If a process repeatedly and continuously checks on completion of an I/O command by staying in running state, then the process can detect command completion promptly, but the processor is unavailable for other processes during the polling period

Engineering Contradiction:
Improvecommand completion detection accuracyVSAvoidprocessor utilization
Core Design Contradiction:
Measurement precisionVSProductivity

Solution Approach 1:

The patent applies dynamics by making the polling behavior adaptive rather than static. The system dynamically adjusts between continuous polling and relinquishing the processor based on real-time conditions such as command type, process priority, and system load. This resolves the contradiction by allowing the processor to be held during critical polling periods while being released during less critical periods, optimizing both detection accuracy and utilization.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes parameters such as polling frequency, polling duration, and processor relinquishment timing based on command characteristics and system state. By adjusting these parameters dynamically, the system can achieve prompt completion detection when needed while maximizing processor availability for other tasks during less critical periods.

Inventive Principle:
Principle #35Parameter changes

2Productivity

If a process is put into not-runnable queue on issuance of I/O command and awakened only after completion, then the processor is made available for other processes, but the process may not receive control of the processor until after a considerable amount of time passes due to context switching delays

Engineering Contradiction:
Improveprocessor utilizationVSAvoidcommand completion detection delay
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The patent applies partial action by having the process relinquish the processor partially rather than completely. Instead of fully entering the not-runnable queue, the process can maintain a limited presence in the runnable queue or use interrupt mechanisms to be awakened sooner. This allows the processor to be made available for other processes while reducing the delay in detecting command completion.

Inventive Principle:
Principle #16Partial or excessive action

3Productivity

If a process polls repeatedly and continuously for only a fixed period of time then sets an interrupt and goes to sleep, then the processor is released after the fixed time period, but the fixed time period must be manually picked based on past experience and remains permanently unchanged

Engineering Contradiction:
Improveprocessor utilizationVSAvoidpolling duration adaptability
Core Design Contradiction:
ProductivityVSAdaptability or versatility

Solution Approach 1:

The patent makes the polling duration dynamic by adjusting it based on command characteristics, process priority, and system load conditions. Rather than using a fixed manually-picked time period, the system adaptively determines the optimal polling duration for each specific situation, resolving the contradiction between processor utilization and adaptability.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent implements feedback mechanisms that monitor system state and command execution progress to dynamically adjust polling duration. By continuously gathering information about command completion patterns and system load, the system can adaptively optimize the polling time period for each command, improving both processor utilization and adaptability.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS11036542B2Automatically limiting repeated checking on completion of a command without relinquishing a processor
Publication Date: 2021.06.15 ORACLE INT CORP
  • US11036542B2 patent drawing
  • US11036542B2 patent drawing
  • US11036542B2 patent drawing

AI summary

A process or thread is implemented to issue a command which executes without use of a processor that issues the command, retain control of the processor to check whether the issued command has completed, and when the issued command has not completed repeat the checking without relinquishing the processor, until a limiting condition is satisfied. The limiting condition may be determined specifically for a current execution of the command, based on one or more factors, such as durations of executions of the command after start of the process or thread and/or an indicator of delay in a current execution of the command. When the limiting condition is satisfied, the processor is relinquished by the process or thread issuing a sleep command, after setting an interrupt. After the command completes, the limiting condition is determined anew based on the duration of the current execution, for use in a next execution.