Dynamic Port Renumbering for Network Chip Logic Optimization

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Solution Overview

Problem

As network chips increase the number of ports, the state space required for each pipe grows, leading to inefficient allocation of logic and increased internal frequency, as much of the state space remains unused.

Innovation Solution

Implementing a dynamic port renumbering scheme on each pipe, where relative port numbers are assigned to minimize the state space needed, allowing for internal parallelism without increasing the total logic on the network chip, and utilizing a self-learning approach to optimize port assignments.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If the number of ports on the network chip is increased, then the network chip can handle more traffic, but the state space per pipe increases leading to increased total logic and inefficient resource allocation

Engineering Contradiction:
Improvenumber of portsVSAvoidtotal logic
Core Design Contradiction:
Quantity of substanceVSDevice complexity

Solution Approach 1:

The patent implements dynamic port renumbering where each pipe maintains a mapping table that dynamically assigns relative port numbers to physical ports. This allows the state space to adapt to the actual number of active ports rather than allocating fixed state space for all possible ports, thereby reducing total logic while maintaining the ability to handle increased port quantities

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the parameter representation from absolute port numbers to relative port numbers within each pipe's context. By transforming the port identification parameter from a global scope (0-255) to a local scope (0-M-1 where M is ports per pipe), the state space requirement per pipe is reduced from 256 entries to only M entries, directly reducing total logic

Inventive Principle:
Principle #35Parameter changes

2Adaptability or versatility

If fixed state space is allocated for each pipe to handle all possible ports, then any port can be assigned to any pipe, but much of the state space remains unused leading to inefficient logic allocation

Engineering Contradiction:
Improveport assignment flexibilityVSAvoidunused logic resources
Core Design Contradiction:
Adaptability or versatilityVSLoss of energy

Solution Approach 1:

The patent applies local quality by making the state space size local to each pipe's actual workload rather than global to all possible ports. Each pipe maintains state space only for the ports currently assigned to it, allowing efficient resource utilization while maintaining flexibility through the dynamic renumbering mechanism that can reassign ports as needed

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS10560399B2Method of dynamically renumbering ports and an apparatus thereof
Publication Date: 2020.02.11 MARVELL ASIA PTE LTD
  • US10560399B2 patent drawing
  • US10560399B2 patent drawing
  • US10560399B2 patent drawing

AI summary

Embodiments of the apparatus of dynamically renumbering ports relate to a network chip that minimizes the total logic on the network chip by limiting the number of states that needs to be preserved for all ports on the network chip. Each pipe on the network chip implements a dynamic port renumbering scheme that dynamically assigns a relative port number for each port assigned to that pipe. The dynamic port renumbering scheme allows for internal parallelism without increasing the total amount of state space required for the ports on the network chip.