Dynamic Power Balancing for Asymmetric Processing Elements
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Solution Overview
Problem
Integrated circuits face challenges in balancing power and performance across asymmetric processing elements and communication buses, leading to inefficiencies in energy consumption and thermal management, particularly in systems-on-chip (SoCs) where individual device power and performance constraints are not adequately balanced for maximum overall performance.
Innovation Solution
A method and apparatus for dynamically balancing power and frequency allocation between processing elements, such as CPU and GPU cores, and communication buses within a power limit, by determining workloads and adjusting performance limits to ensure that devices with higher workloads receive additional resources while others are capped to maintain overall performance and adhere to power constraints.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If power is allocated equally among all processing elements, then each device operates within its individual constraints, but overall system performance is not maximized due to asymmetric workload requirements
Solution Approach 1:
The patent applies local quality by differentiating power allocation based on individual device characteristics and workload requirements. Each processing element receives customized power limits rather than uniform allocation, with the power management circuit adjusting limits dynamically according to device type (e.g., GPU vs. CPU), current workload, and performance requirements. This resolves the contradiction by optimizing both overall performance and energy efficiency through localized, adaptive power management.
Solution Approach 2:
The patent implements dynamics by making power limits adjustable and adaptive rather than static. The power management circuit continuously monitors workload, device performance, and power consumption, then dynamically modifies power allocation in real-time. This allows the system to respond to changing conditions, maximizing performance when needed while conserving energy during lower-demand periods, thus resolving the contradiction between performance and energy efficiency.
2Productivity
If power limits are set for the entire integrated circuit package, then overall power consumption is controlled, but individual devices cannot optimize their performance within available power budget
Solution Approach 1:
The patent applies segmentation by dividing the total power budget into device-specific power limits. Instead of managing power at the package level only, the system allocates portions of the power budget to individual processing elements based on their requirements. The power management circuit enforces these segmented limits while allowing each device to operate independently within its allocated portion, thus enabling performance optimization without compromising overall power control.
Solution Approach 2:
The patent implements parameter changes by dynamically adjusting power limits as a controllable parameter. The system modifies power allocation parameters in response to workload changes, device performance metrics, and thermal conditions. This allows flexible optimization of individual device performance while maintaining control over total power consumption through parameter-based management.
3Speed
If processing elements operate at maximum performance, then workload is completed faster, but power consumption and thermal generation exceed limits
Solution Approach 1:
The patent applies feedback by implementing continuous monitoring of power consumption and thermal conditions, then using this information to adjust power limits dynamically. The power management circuit receives feedback from sensors and performance monitors, compares current state against limits and targets, and modifies power allocation accordingly. This closed-loop control enables the system to maintain high performance when thermal conditions permit while preventing overheating, thus resolving the contradiction between speed and thermal management.
Data Source
AI summary
An apparatus, method and system is described herein for efficiently balancing performance and power between processing elements based on measured workloads. If a workload of a processing element indicates that it is a bottleneck, then its performance may be increased. However, if a platform or integrated circuit including the processing element is already operating at a power or thermal limit, the increase in performance is counterbalanced by a reduction or cap in another processing elements performance to maintain compliance with the power or thermal limit. As a result, bottlenecks are identified and alleviated by balancing power allocation, even when multiple processing elements are operating at a power or thermal limit.