Dynamic Power Budget Allocation Between Discrete Processors
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Computing devices with discrete graphics engines face challenges in balancing and managing power limits effectively, leading to suboptimal performance due to static turbo power limits and poor power management schemes that fail to dynamically adjust power allocation between the CPU and discrete graphics processor.
Innovation Solution
Implementing a power balancing system that uses thermal, utilization, and power metrics to dynamically rebalance power between discrete processors, incorporating a sideband communication channel for faster telemetry and adjusting power budgets based on thermal limitations and activity levels to prevent false balancing transitions and optimize performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If static turbo power limits are used for discrete processors, then power management is simplified, but performance is suboptimal due to inability to dynamically adjust power allocation
Solution Approach 1:
The patent implements dynamic power limit adjustment by continuously monitoring thermal metrics and utilization levels of discrete processors, then adjusting power budgets in real-time based on current operating conditions. This allows the system to transition from static to dynamic power management, optimizing performance while maintaining manageable complexity through automated feedback control.
Solution Approach 2:
The system employs feedback mechanisms by monitoring thermal metrics and processor utilization, then using this information to adjust power allocation between discrete processors. The feedback loop enables the power management system to respond to changing operational conditions, resolving the contradiction between simplified management and optimal performance.
2Loss of energy
If power budgets are dynamically rebalanced between discrete processors, then power efficiency is enhanced, but computational overhead increases
Solution Approach 1:
The power management system operates autonomously by automatically monitoring thermal metrics, detecting when processors are thermally limited, and rebalancing power budgets without requiring extensive external control or complex computational overhead. The system serves itself by using its own monitoring capabilities to drive power allocation decisions.
Solution Approach 2:
The system changes power budget parameters dynamically based on thermal conditions and utilization metrics. By adjusting power allocation parameters in response to monitored conditions, the system achieves improved power efficiency while keeping computational overhead manageable through parameter-based control rather than complex algorithms.
3Productivity
If thermal metrics are monitored and power budgets are adjusted in response to thermal limitations, then performance is optimized, but system complexity increases
Solution Approach 1:
The system uses feedback from thermal metric monitoring to automatically adjust power budgets when processors are detected as thermally limited. This feedback-driven approach optimizes performance by responding to actual thermal conditions while maintaining manageable system complexity through automated control logic.
Solution Approach 2:
The power management system acts as an intermediary between thermal monitoring and power allocation, translating thermal metric data into power budget adjustments. This intermediary role enables performance optimization through thermal-aware power management while keeping system complexity organized through a clear control hierarchy.
Data Source
AI summary
Methods, apparatus, systems and articles of manufacture for power sharing between discrete processors are disclosed. An example apparatus includes a thermal monitor to monitor temperatures of first and second discrete processors and a balance controller to, in response to a first temperature of the first processor satisfying a temperature threshold, adjust first and second power budgets allocated to the respective first and second processors.