Dynamic Pre-charge Circuit for Flash Memory Sensing
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Solution Overview
Problem
In flash memory, existing pre-charge mechanisms often result in a fixed-length pre-charge time period, leading to overcharge phenomena and reduced memory performance, especially in high-density and low-working voltage designs, which hampers data read-out speed.
Innovation Solution
A sensing circuit with a dynamically-adjusted pre-charge mechanism, incorporating a pre-charge circuit, sensing current-to-voltage generator, auxiliary current-to-voltage generator, reference current-to-voltage generator, and detection circuit, which compares detected voltage with a reference voltage to determine the end of the pre-charge time period, preventing overcharge and optimizing pre-charge operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a fixed-length pre-charge time period is used, then the pre-charge mechanism is simple to implement, but overcharge phenomenon occurs and the sensing speed is reduced
Solution Approach 1:
The patent implements a dynamic pre-charge mechanism where the pre-charge time period is adjusted based on detected voltage levels. The system transitions from a fixed-time pre-charge approach to a voltage-threshold-based dynamic adjustment, allowing the pre-charge duration to adapt to different operating conditions and prevent overcharge while maintaining simple circuit architecture
Solution Approach 2:
The patent introduces a feedback mechanism where the detection circuit continuously monitors the voltage level on the bit line during pre-charge and provides feedback to control the pre-charge signal termination. This closed-loop control ensures the pre-charge operation stops precisely when the voltage threshold is reached, preventing overcharge and optimizing sensing speed
2Device complexity
If a fixed-intensity pre-charge signal is used, then the pre-charge circuit is simple to design, but overcharge phenomenon occurs and memory performance is reduced
Solution Approach 1:
The patent dynamically changes the pre-charge signal intensity parameter based on the detected voltage level. Instead of using a constant pre-charge current, the system adjusts the pre-charge signal strength in response to real-time voltage measurements, optimizing the charging process to reach the target voltage threshold efficiently without exceeding it
3Reliability
If the pre-charge time period is extended to ensure adequate pre-charge, then pre-charge completeness is improved, but the overall sensing time increases and read-out speed decreases
Solution Approach 1:
The patent implements a self-regulating pre-charge mechanism where the system automatically determines when pre-charge is complete based on real-time voltage detection. The detection circuit monitors the bit line voltage and autonomously controls the termination of pre-charge operations, eliminating the need for conservative fixed-time extensions while ensuring adequate pre-charge is achieved
Data Source
AI summary
A current-sensing circuit for a memory and a sensing method thereof are provided. The current-sensing circuit includes a pre-charge circuit, a sensing current-to-voltage generator, an auxiliary current-to-voltage generator, a reference current-to-voltage generator, and a detection circuit. The pre-charge circuit provides a pre-charge signal to a selected bit line during a pre-charge time period. The sensing current-to-voltage generator generates a sensing voltage to a memory cell current of the selected bit line via a first load. The auxiliary current-to-voltage generator provides a detection voltage to a portion of the memory cell current of the selected bit line via a second load. The reference current-to-voltage generator provides a reference voltage during a data-sensing time period. The detection circuit determines an end time point of the pre-charge time period by comparing a detected voltage generated by the second load with a reference voltage.