Floating-Point Decomposition Circuitry for Flexible ML Precision

Resolve Bottlenecks,
Find Innovative SolutionsGenerate Solutions

Solution Overview

Problem

Conventional programmable integrated circuits for machine learning are limited to fixed precision, leading to inefficiencies and hardware overhead when switching between different precisions, such as in deep learning applications.

Innovation Solution

Implementing circuitry that dynamically decomposes high precision floating-point numbers into lower precision components, allowing for flexible precision operations through temporal or spatial decomposition, thereby optimizing hardware usage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If the circuit is designed to support high precision operations, then measurement precision is improved, but device complexity increases

Engineering Contradiction:

ImproveprecisionVSAvoidhardware overhead

Core Design Contradiction:

Measurement precisionVSDevice complexity

Solution Approach 1:

The circuit dynamically adjusts its precision level based on operational requirements. The patent implements a precision selection mechanism that allows the same hardware to operate at different precision levels (e.g., high precision or low precision modes) without physical reconfiguration, thereby reducing hardware overhead while maintaining measurement precision when needed.

Inventive Principle:

Principle #15Dynamics

Solution Approach 2:

The patent changes the precision parameter of the circuit operationally rather than structurally. By using configuration bitstreams to control precision levels, the system can switch between high and low precision modes without changing the physical hardware architecture, thus avoiding increased device complexity while maintaining the capability for high precision measurements.

Inventive Principle:

Principle #35Parameter changes

2Adaptability or versatility

If the device is reprogrammed to support different precision levels, then adaptability is improved, but loss of time increases

Engineering Contradiction:

Improveprecision flexibilityVSAvoidreprogramming latency

Core Design Contradiction:

Adaptability or versatilityVSLoss of time

Solution Approach 1:

The patent prepares multiple configuration bitstreams in advance, each corresponding to different precision levels. The desired precision mode can be selected and applied without time-consuming reprogramming, as the configuration data is pre-prepared and can be loaded quickly, thus improving adaptability while minimizing time loss.

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The circuit is designed to be universal and support multiple precision levels through a single hardware architecture. By using a precision selection mechanism controlled by configuration bitstreams, the same hardware can perform both high precision and low precision operations without requiring separate dedicated circuits for each precision level, thereby achieving adaptability without significant reprogramming time.

Inventive Principle:

Principle #6Universality (Multi-functionality)

3Adaptability or versatility

If multiple PLDs are used to support different precisions, then adaptability is improved, but device complexity increases

Engineering Contradiction:

Improveprecision supportVSAvoidhardware overhead

Core Design Contradiction:

Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent merges the functionality of multiple precision-supporting circuits into a single PLD by implementing a precision selection mechanism. Instead of using separate PLDs for high precision and low precision operations, the system combines both capabilities in one device through configurable logic, thereby reducing hardware overhead while maintaining adaptability across different precision requirements.

Inventive Principle:

Principle #5Merging (Combining)

Solution Approach 2:

The single PLD is designed to be universal and support multiple precision levels through configuration bitstreams. This multi-functional approach eliminates the need for multiple dedicated PLDs, reducing hardware overhead while maintaining the ability to adapt to different precision requirements through software-controlled configuration rather than hardware multiplication.

Inventive Principle:

Principle #6Universality (Multi-functionality)

Data Source

PatentUS12455722B2Floating-point decomposition circuitry with dynamic precision

Publication Date: 2025.10.28 ALTERA CORP

AI summary

Circuitry for decomposing block floating-point numbers into lower precision floating-point numbers is provided. The circuitry may include a high precision storage circuit configured to provide high precision floating-point numbers, input selectors configured to receive the high precision floating-point numbers from the high precision storage circuit and to generate corresponding lower precision floating-point components with adjusted exponents, and a low precision block floating-point vector circuit configured to combine the various lower precision floating-point components generated by the input selectors. The lower precision floating-point components may be processed spatially or over multiple iterations over time.