Dynamic Multiple Level Program Verify for Flash Memory Charge Loss
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Solution Overview
Problem
Flash memory devices experience charge loss due to electron leakage and detrapping, leading to shifts in threshold voltage distributions, which enlarges the Vt distribution and reduces the number of programmable states in MLC devices, causing errors in reading different states.
Innovation Solution
Implementing a dynamic, multiple level program verification method that initially sets the program verify voltage higher to account for quick charge loss, then adjusts to a lower verify voltage once a reference voltage is reached or a specific pulse count is met, to prevent further programming and maintain accurate threshold voltages.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a single fixed program verify voltage is used, then the verification process is simple, but it cannot account for quick charge loss and leads to inaccurate threshold voltage verification
Solution Approach 1:
The single program verify operation is segmented into multiple verify operations at different voltage levels. The method performs an initial program verify at a first verify voltage, and if the cell fails, performs a second program verify at a second verify voltage that is higher than the first. This segmentation allows the system to account for quick charge loss by checking at multiple voltage points, thereby improving verification accuracy without requiring complex multi-level programming.
Solution Approach 2:
The program verify process transitions from a static single-voltage approach to a dynamic multi-voltage approach. The verify voltage is adjusted based on the results of previous verification attempts and the number of programming pulses applied. This dynamic adjustment allows the system to adapt to charge loss conditions and maintain accurate verification while keeping the overall process manageable through conditional logic.
2Quantity of substance
If multiple level cell (MLC) devices use closely spaced state distributions, then more states can be stored, but quick charge loss causes threshold voltage shifts that enlarge the Vt distribution and cause reading errors
Solution Approach 1:
The method performs preliminary verification at elevated voltage levels during the programming process to detect and account for quick charge loss before it affects the final stored state. By verifying at multiple voltage points and adjusting the verify voltage based on programming pulse count, the system preliminarily compensates for charge loss effects, ensuring that the final threshold voltage distribution remains within acceptable boundaries for reliable reading.
Solution Approach 2:
The program verify voltage parameter is changed dynamically during the programming process. The method adjusts the verify voltage based on the number of programming pulses applied and the results of previous verification attempts. This parameter change allows the system to compensate for quick charge loss and maintain accurate threshold voltage distributions, thereby preserving data retention reliability in MLC devices.
3Measurement precision
If the program verify voltage is set high to account for quick charge loss, then verification accuracy is improved, but the programming process takes longer and consumes more energy
Solution Approach 1:
The method implements periodic verification at different voltage levels during the programming process. Instead of continuously verifying at the highest voltage, the system performs verification at a first verify voltage, and only if needed performs a second verification at a higher second verify voltage. This periodic action based on conditional results reduces unnecessary high-voltage verification steps, thereby reducing time and energy consumption while maintaining accuracy when needed.
Solution Approach 2:
The program verify process incorporates feedback from previous verification attempts to determine the next verification voltage. Based on whether the cell passes or fails the initial verify and the number of programming pulses applied, the system adjusts the verify voltage for subsequent attempts. This feedback mechanism ensures that high-voltage verification is applied only when necessary, optimizing both time and energy efficiency while maintaining verification accuracy.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces the effects of quick charge loss, maintaining accurate threshold voltages and preventing errors in reading states, thereby enhancing the reliability and data retention of flash memory devices.
Implementation Method 1
The programming pulse increases a charge level on a floating gate of the target memory cell, thereby increasing the cell's threshold voltage
Implementation Method 2
Single bit charge loss is the result of a defective memory cell that exhibits electron leakage from the floating gate through the tunnel oxide to the active region. This leakage is typically due to oxide defects or trap assisted tunneling
Implementation Method 3
Intrinsic charge loss is a detrapping of electron traps near the tunnel oxide interface out to the channel region. Intrinsic charge loss can be accelerated with high temperature stress
Data Source
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AI summary
Methods for multiple level program verify, memory devices, and memory systems are disclosed. In one such method, a series of programming pulses are applied to a memory cell to be programmed. A program verify pulse, at an initial program verify voltage, is applied to the memory cell after each programming pulse. The initial program verify voltage is a verify voltage that has been increased by a quick charge loss voltage. The quick charge loss voltage is subtracted from the initial program verify voltage after either a programming pulse has reached a certain reference voltage or a quantity of programming pulses has reached a pulse count threshold.