Dynamic Programming Mode Selection for NAND Flash Memory Wear

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Solution Overview

Problem

Conventional methods for NAND flash memory modules, such as MLC and TLC, can only use the second programming mode after the erase count exceeds a threshold, leading to reduced writing performance and inefficient data storage, as the first programming mode is no longer available.

Innovation Solution

A data writing method that dynamically determines whether to use the first or second programming mode based on the available and required data amounts, allowing the memory cells to be programmed accordingly, thereby extending the use of the first programming mode beyond the threshold erase count.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the erase count exceeds a threshold, then the memory module reliability is maintained by switching to the second programming mode, but the writing performance deteriorates because the first programming mode is no longer available

Engineering Contradiction:

Improvememory module reliabilityVSAvoidwriting performance

Core Design Contradiction:

ReliabilityVSProductivity

Solution Approach 1:

The patent implements dynamic programming mode selection by continuously monitoring the erase count and switching between first and second programming modes based on current conditions. Instead of a static threshold-based approach, the system dynamically adjusts the programming mode to balance reliability and writing performance based on real-time memory wear status.

Inventive Principle:

Principle #15Dynamics

Solution Approach 2:

The patent changes the programming mode parameter based on the erase count threshold. When the erase count exceeds the threshold, the system transitions from the first programming mode to the second programming mode, and can switch back when the threshold is no longer exceeded, thereby adapting the programming parameters to the current memory wear state.

Inventive Principle:

Principle #35Parameter changes

2Productivity

If the first programming mode is used exclusively, then the writing performance remains high, but the memory module lifespan decreases due to excessive wear from frequent erases

Engineering Contradiction:

Improvewriting performanceVSAvoidmemory module lifespan

Core Design Contradiction:

ProductivityVSDuration of action of stationary object

Solution Approach 1:

The patent employs feedback control by monitoring the erase count and using this information to determine when to switch programming modes. The system provides feedback to the programming logic, enabling it to adjust the programming mode based on the current wear level, thus preventing excessive wear while maintaining performance.

Inventive Principle:

Principle #23Feedback

Solution Approach 2:

The patent makes the programming mode dynamic rather than fixed, allowing the system to adapt between first and second programming modes based on real-time erase count monitoring. This dynamic adjustment optimizes the balance between writing performance and memory lifespan by selecting the appropriate mode based on current wear conditions.

Inventive Principle:

Principle #15Dynamics

3Reliability

If the second programming mode is used after threshold exceedance, then the memory wear is reduced, but the data storage efficiency decreases

Engineering Contradiction:

Improvememory wear resistanceVSAvoiddata storage efficiency

Core Design Contradiction:

ReliabilityVSQuantity of substance

Solution Approach 1:

Inventive Principle:

Principle #35Parameter changes

Solution Approach 2:

The patent makes the programming system multi-functional by implementing both first and second programming modes within the same memory controller. The system can universally handle different programming scenarios by selecting the appropriate mode based on the erase count, enabling it to optimize for either performance or wear resistance as needed.

Inventive Principle:

Principle #6Universality (Multi-functionality)

Data Source

PatentUS10747471B2Cell programming method, memory control circuit unit and memory storage device

Publication Date: 2020.08.18 PHISON ELECTRONICS

AI summary

A data writing method, a memory control circuit unit, and a memory storage device are provided. The method includes: determining whether to use a first programming mode or a second programming mode to program memory cells according to a first data amount and a second data amount; when the first data amount is greater than the second data amount, programming the memory cells by using the first programming mode; and when the first data amount is not greater than the second data amount, programming the memory cells by using the second programming mode.