Dynamic Quantizer Reset Voltage Control for Speed-Noise Tradeoffs
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Solution Overview
Problem
Quantizers, particularly those with STRONGARM-type topology, face challenges in balancing timing performance, input-referred RMS noise, and offset voltage, as existing methods to improve one parameter often degrade others, such as reducing tail current to lower noise and offset but increasing clock-to-q time, or increasing tail current to improve timing but reducing gain.
Innovation Solution
The implementation of a quantizer circuit with multiple voltage supplies, where the input circuit and regeneration circuit operate at different voltage levels, allowing for independent adjustment of the voltage supply to the reset devices to optimize timing and noise performance, using a control circuit to generate and regulate these voltages based on process, voltage, and temperature conditions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If tail current is reduced to lower input-referred RMS noise and offset voltage, then noise and offset improve, but clock-to-q time increases and timing performance degrades
Solution Approach 1:
The patent segments the quantizer circuit into distinct functional blocks (input circuit, regeneration circuit, reset circuit) that can be independently optimized. By providing separate voltage supplies to different circuits within the quantizer, the invention enables independent control of tail current for noise optimization while maintaining adequate timing performance through separate control of other circuit parameters.
Solution Approach 2:
The patent applies local quality by providing different voltage levels to different parts of the quantizer circuit. Specifically, the input circuit receives a first voltage supply while the regeneration circuit receives a second voltage supply, allowing each circuit to operate at optimal voltage levels for its specific function, thereby resolving the trade-off between noise performance and timing.
2Speed
If tail current is increased to improve clock-to-q time, then timing performance improves, but gain reduces and input-referred RMS noise and offset voltage worsen
Solution Approach 1:
The patent segments the quantizer circuit into distinct functional blocks (input circuit, regeneration circuit, reset circuit) that can be independently optimized. By providing separate voltage supplies to different circuits within the quantizer, the invention enables independent control of tail current for noise optimization while maintaining adequate timing performance through separate control of other circuit parameters.
Solution Approach 2:
The patent applies local quality by providing different voltage levels to different parts of the quantizer circuit. Specifically, the input circuit receives a first voltage supply while the regeneration circuit receives a second voltage supply, allowing each circuit to operate at optimal voltage levels for its specific function, thereby resolving the trade-off between noise performance and timing.
3Measurement precision
If input device size is increased to increase gain, then input-referred RMS noise and offset voltage improve, but input capacitance and internal parasitic capacitance increase and timing performance degrades
Solution Approach 1:
The patent applies local quality by providing different voltage levels to different parts of the quantizer circuit. Specifically, the input circuit receives a first voltage supply while the regeneration circuit receives a second voltage supply, allowing each circuit to operate at optimal voltage levels for its specific function, thereby resolving the trade-off between noise performance and timing.
Solution Approach 2:
The patent changes the voltage parameter supplied to different circuits within the quantizer. By providing a first voltage to the input circuit and a second voltage to the regeneration circuit, the invention enables optimization of device sizes and operating points independently, resolving the trade-off between gain and timing performance.
Data Source
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AI summary
Various implementations are presented herein that improve the performance of dynamic quantizers over process, voltage and temperature ("PVT") and input common mode (Vcm) variations. This can be accomplished by separating and then varying the voltage supply (1 10) to the reset devices (170) connected to the input devices of the quantizer while leaving the supply to the other parts of the quantizer unchanged. The timing performance of the quantizer can be improved (reduced clock-to-q) by lowering the voltage supply to the reset devices. The input referred RMS noise and offset voltage of the circuit can be improved (reduced) by raising the voltage supply to the reset devices. Similarly, increases in Vcm due to process and voltage scaling can be mitigated by raising the voltage supply to the reset devices. Control systems are also provided herein to control the voltage supply to the reset devices to accomplish these and other objectives.