Dynamic Read Parameter Adjustment for 3D NAND Memory
Solution Overview
Problem
Current non-volatile memory technologies face challenges in accurately sensing threshold voltage of memory cells while minimizing power consumption, especially in 3D NAND memory structures.
Innovation Solution
A memory apparatus and method that adjust read parameters based on the number of programmed memory cells in each block, allowing for precise determination of threshold voltage levels during read operations, thereby optimizing power usage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If conventional read operations are used in 3D NAND memory, then power consumption is reduced, but threshold voltage sensing accuracy deteriorates
Solution Approach 1:
The patent implements dynamic adjustment of read parameters (such as read voltage levels and timing) based on the detected programming state of memory blocks. The system transitions from static read operations to dynamic read operations, where parameters are adapted in real-time according to the number of programmed cells, thereby achieving high sensing accuracy only when needed while maintaining low power consumption during normal operations.
Solution Approach 2:
The system changes physical parameters (read voltage levels, timing sequences) based on the programming state of memory blocks. By detecting whether a block is in an open or closed state and adjusting read parameters accordingly, the system achieves accurate threshold voltage sensing only when necessary, rather than continuously, thus resolving the contradiction between measurement precision and energy consumption.
2Measurement precision
If read parameters are adjusted dynamically based on programmed cell amount, then threshold voltage sensing accuracy is improved, but device complexity increases
Solution Approach 1:
The patent implements a feedback mechanism where the system first performs an initial read operation to detect the programming state (open or closed block), then uses this information to adjust subsequent read parameters. This feedback loop enables accurate threshold voltage sensing by adapting to the actual memory state, while the complexity is managed through systematic detection and adjustment protocols.
Solution Approach 2:
The system performs preliminary detection of the programming state before executing the main threshold voltage sensing operation. By预先 determining whether blocks are open or closed and preparing appropriate read parameters in advance, the system avoids complex real-time adjustments during the critical sensing phase, thereby reducing operational complexity while maintaining high accuracy.
3Device complexity
If fixed read parameters are used, then device complexity is reduced, but sensing accuracy for different programming states deteriorates
Solution Approach 1:
The patent segments the read operation into distinct phases: initial detection phase to determine programming state, and main sensing phase with adjusted parameters. This segmentation allows the system to use simple fixed parameters for most operations while applying specialized parameter adjustments only when needed for accurate threshold voltage detection, thereby maintaining low complexity overall while achieving high precision when required.
Data Source
AI summary
A memory apparatus and method of operation are provided. The apparatus includes memory cells configured to retain a threshold voltage corresponding to one of a plurality of data states. The memory cells are disposed in memory holes grouped in blocks. A control means is configured to determine an amount of the memory cells of one of the blocks that are programmed during at least one read operation. The control means adjusts at least one read parameter based on the amount of the memory cells of the one of the blocks that are programmed. The control means is also configured to utilize the adjusted at least one read parameter while reading the memory cells to determine if the memory cells have the threshold voltage above one or more read levels associated with each of the plurality of data states in the at least one read operation.