Dynamic Read Level Adjustment for NAND Flash Data Retention
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
As NAND flash memory cells shrink in size, they become more susceptible to interference noise and errors due to program disturb, read disturb, and data retention issues, leading to reliability concerns in large-capacity memory systems like SSDs.
Innovation Solution
A memory system that adjusts read levels and voltages based on usage patterns and environmental factors, using a management table to determine when to shift read levels higher or lower to compensate for program disturb, read disturb, and data retention effects, ensuring accurate data retrieval.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If NAND flash memory cells are shrunk to increase storage capacity, then storage density is improved, but susceptibility to interference noise and errors increases
Solution Approach 1:
The patent changes the read voltage parameter dynamically based on the number of rewrites. The read voltage is adjusted to a higher level when rewrite count exceeds a threshold, compensating for threshold voltage shifts caused by program disturb and data retention issues in scaled-down memory cells.
Solution Approach 2:
The read voltage is made dynamic rather than fixed. The system transitions from a static read voltage approach to a dynamic one that adapts based on memory cell usage history (rewrite count), allowing the system to optimize read accuracy under varying conditions of memory cell degradation.
2Measurement precision
If read voltage is increased to compensate for threshold voltage shift, then data reading accuracy is improved, but power consumption increases
Solution Approach 1:
Instead of always using a high read voltage, the system applies the higher voltage only partially - specifically when the rewrite count exceeds a threshold. This partial application of excessive voltage (higher than normal read voltage) achieves the necessary compensation only when needed, rather than continuously.
Solution Approach 2:
The read voltage parameter is changed conditionally based on rewrite count. The system monitors the number of rewrites and adjusts the read voltage parameter accordingly, switching between normal and higher voltage levels to balance accuracy and power consumption.
3Measurement precision
If read level is shifted higher to compensate for program disturb, then correct data reading is improved, but interference with adjacent cells increases
Solution Approach 1:
The higher read level is applied only partially - specifically when rewrite count exceeds a threshold indicating significant program disturb. This avoids continuously applying a higher read level that would exacerbate interference with adjacent cells while still providing compensation when actually needed.
Solution Approach 2:
The system monitors rewrite count in advance and determines the appropriate read level before performing the read operation. This preliminary assessment of memory cell state allows the system to prepare the correct read voltage level, shifting higher only when program disturb is likely to have occurred.
Data Source
AI summary
According to one embodiment, a memory system includes a nonvolatile semiconductor memory device, a voltage generation unit and a control unit. The nonvolatile semiconductor memory device includes a memory cell array having a plurality of blocks each including a plurality of memory cells, and a voltage generation unit configured to change a read level of the memory cell. The control unit controls write, read, and erase of the nonvolatile semiconductor memory device. The control unit changes the read level between a start of use of the nonvolatile semiconductor memory device and a timing after an elapse of a time.