Dynamic Reference Current Circuit for Flash Memory Read Margin

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Solution Overview

Problem

In MONOS flash memory cells, the fixed reference current becomes inaccurate after repeated programming and erasing, leading to charge loss and incorrect data sensing due to the discrepancy between the cell current and the fixed reference current.

Innovation Solution

Implementing a dynamic reference current that adjusts based on the current in the flash memory cell, generated by averaging currents corresponding to low and high logical values, ensuring consistent comparison and accurate data sensing.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If a fixed value reference current is used for sensing data in flash memory cells, then the device complexity is reduced and ease of operation is improved, but the measurement precision deteriorates after repeated programming and erasing due to charge loss in the flash cells

Engineering Contradiction:
Improvereference current system complexityVSAvoiddata sensing accuracy
Core Design Contradiction:
Device complexityVSMeasurement precision

Solution Approach 1:

The patent applies the dynamics principle by transitioning from a fixed reference current to a dynamic reference current that automatically adjusts based on the actual cell current characteristics. The system uses real-time feedback from the flash memory cell current to modify the reference current value, enabling the reference current to adapt to charge loss and programming/erasing cycles, thereby maintaining measurement precision without excessive complexity increase

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent implements feedback by using the sensed cell current information to adjust the reference current dynamically. The system continuously monitors the flash memory cell current characteristics and feeds this information back to modify the reference current, creating a closed-loop system that compensates for charge loss and maintains accurate data sensing over repeated operations

Inventive Principle:
Principle #23Feedback

2Ease of operation

If a fixed value reference current is used, then the ease of operation is improved, but the reliability deteriorates after repeated programming and erasing operations

Engineering Contradiction:
Improvereference current implementation simplicityVSAvoiddata sensing reliability
Core Design Contradiction:
Ease of operationVSReliability

Solution Approach 1:

The system transitions from a static fixed reference current to a dynamic reference current that automatically adapts to changing flash memory cell characteristics. This dynamic adjustment mechanism maintains reliability over repeated programming and erasing operations while keeping the implementation relatively simple through automated feedback-based modification

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent applies self-service by enabling the reference current system to automatically adjust itself based on the flash memory cell's actual performance. The system uses the cell's own current characteristics to generate the appropriate reference current value, eliminating the need for external manual recalibration and maintaining reliability autonomously

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS11657881B2Dynamic reference current memory array and method
Publication Date: 2023.05.23 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US11657881B2 patent drawing
  • US11657881B2 patent drawing
  • US11657881B2 patent drawing

AI summary

A memory array includes a plurality of column segments, each column segment including a plurality of columns of memory cells, a plurality of sense amplifiers selectively coupled to each column of the plurality of columns of a corresponding column segment, pluralities of first and second reference cells, and a reference current circuit. The reference current circuit generates a reference current based on a first current generated by a first reference cell programmed to a low logical value and a second current generated by a second reference cell programmed to a high logical value. Each sense amplifier generates a mirror current based on the reference current, and a logical value based on a comparison of the mirror current to a cell current received from a memory cell of a column of the plurality of columns of the corresponding column segment.