Dynamic Reference Resistance for Resistive Memory Sensing
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Solution Overview
Problem
Conventional resistive memory devices face cell resistance drift due to factors like use cycles and temperature changes, leading to errors in data sensing as the resistance difference between memory cells and a fixed reference resistance decreases, causing misinterpretation of programmed and erased states.
Innovation Solution
Generating a reference resistance using multiple programmable reference cells that mirror the usage and temperature history of memory cells, allowing for comparison with memory cell resistances to maintain a wide sensing window even after resistance shifts, through methods such as averaging or offsetting resistances.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a fixed reference resistance is used for data sensing, then the sensing operation is simple, but resistance drift causes the sensing window to shrink and sensing accuracy to deteriorate
Solution Approach 1:
The patent transforms the static fixed reference resistance into a dynamic reference resistance that automatically adapts to resistance drift. The reference cell undergoes the same programming and erasing operations as memory cells, causing its resistance to drift in parallel. This dynamic adjustment maintains a consistent sensing window regardless of drift magnitude, resolving the contradiction between simplicity and accuracy.
Solution Approach 2:
The patent creates a copy of the memory cell's behavior in the reference cell. The reference cell mirrors the programming and erasing cycles of memory cells, effectively copying the resistance drift characteristics. This copying mechanism ensures that the reference resistance tracks the memory cell resistance changes, maintaining accurate sensing windows without complex compensation circuits.
2Measurement precision
If differential sensing with two resistive elements per bit is used, then the sensing window remains wide, but the area per stored bit doubles
Solution Approach 1:
The patent introduces a reference cell as an intermediary element that mediates the sensing operation. Instead of directly comparing two memory cell states, the sensed memory cell is compared against the reference cell that has undergone identical programming/erasing cycles. This intermediary approach maintains wide sensing windows while using only one physical resistive element per stored bit, halving the area requirement compared to differential sensing.
3Measurement precision
If reference cells undergo the same programming and erasing cycles as memory cells, then resistance drift is compensated and sensing accuracy improves, but additional operations are required to maintain reference cells
Solution Approach 1:
The patent merges the reference cell maintenance operations with the normal memory write operations. When data is written to memory cells, the reference cell undergoes the same programming or erasing cycle simultaneously. This combining of operations means that maintaining accurate reference values does not require separate dedicated operations, eliminating the productivity penalty that would otherwise result from additional reference cell maintenance steps.
Data Source
AI summary
A memory device can include a plurality of memory cells formed in a substrate, each having a resistive element programmable between at least two different resistance states, including memory cells configured to store data received by the memory device, and reference cells; a reference circuit formed in the substrate configured to generate at least a first reference resistance from resistances of a plurality of reference cells; a sense circuit formed in the substrate coupled to the memory cells and at least the first reference resistance and configured to compare a resistance of a selected memory cell to at least the first reference resistance to determine the data stored by the selected memory cell.