Dynamic Reference Voltage Generation for Memory Controllers
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Solution Overview
Problem
Existing memory control circuits face challenges in generating an accurate internal reference voltage due to manufacturing deviations in impedance elements, leading to errors in data access operations and prolonged boot times, especially when channel noise interferes with the correction process.
Innovation Solution
A memory control circuit unit and method that dynamically generates an internal reference voltage by detecting the impedance characteristics of both the memory controller and volatile memory, allowing the voltage value to be positively correlated with the supply voltage, thereby reducing the impact of manufacturing deviations and eliminating the need for frequent data access corrections.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a fixed internal reference voltage is used in the memory interface, then the circuit design is simple, but manufacturing deviations in impedance elements cause data access errors and require frequent corrections
Solution Approach 1:
The patent implements a dynamic internal reference voltage generation mechanism that automatically adjusts the voltage level based on detected impedance characteristics. The memory interface circuit detects impedance values during data access operations and dynamically modifies the internal reference voltage accordingly, transforming a static fixed voltage system into a dynamic adaptive system that compensates for manufacturing deviations in real-time
Solution Approach 2:
The patent establishes a feedback loop where the memory interface continuously monitors impedance characteristics during data access and uses this information to adjust the internal reference voltage. The detection result feeds back to the voltage generation circuit, creating a closed-loop control system that automatically corrects voltage deviations caused by impedance variations without external intervention
2Reliability
If the internal reference voltage is dynamically adjusted based on impedance detection, then data access accuracy improves, but the boot time is prolonged due to the detection and correction process
Solution Approach 1:
The patent performs impedance detection and internal reference voltage adjustment during the initialization phase before normal data access operations begin. By completing the detection and correction process in advance during boot-up, the system ensures accurate voltage levels are established before operational demands arise, preventing errors during active use while confining the time penalty to the initialization period
Solution Approach 2:
The patent accelerates the impedance detection and voltage adjustment process during boot-up by optimizing the detection algorithm and circuit response. The system rapidly completes the necessary measurements and corrections in a condensed time window during initialization, then transitions to normal high-speed operation without repeating the detection process, effectively skipping lengthy correction cycles during operational phases
3Reliability
If impedance detection and voltage correction are performed frequently, then data transmission accuracy is maintained, but power consumption increases
Solution Approach 1:
The patent implements periodic impedance detection and voltage adjustment at predetermined intervals during data access operations rather than continuously. The system performs detection and correction cycles at strategically chosen moments when data transmission patterns allow, transforming continuous monitoring into discrete periodic actions that maintain accuracy while significantly reducing the cumulative power consumption associated with constant detection and adjustment
Data Source
AI summary
A memory control circuit unit, a memory storage device and a reference voltage generation method are provided. The method comprises: detecting a first impedance characteristic of a memory controller via a first connection interface of a memory interface and detecting a second impedance characteristic of a volatile memory via a second connection interface of the memory interface; generating an internal reference voltage according to a detection result; and resolving data signal received by the memory interface according to the internal reference voltage. Therefore, an influence on the internal reference voltage owing to the manufacture deviation of impedance element of the memory controller and/or the volatile memory can be reduced.