Dynamic Refresh Cycle Control for DRAM Power Optimization
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Solution Overview
Problem
Semiconductor devices face challenges in reducing power consumption while maintaining data retention in volatile memory devices like DRAM, as the refresh cycle for memory cells is typically short, leading to increased power usage and potential data loss.
Innovation Solution
A semiconductor device with a refresh control circuit that adjusts the refresh cycle by initially executing a short cycle and then elongating it after a predetermined period, ensuring data retention without increasing power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by stationary object
If the refresh cycle is extended to reduce power consumption, then power consumption is reduced, but data retention may be compromised
Solution Approach 1:
The refresh cycle is made dynamic rather than fixed. The control circuit adjusts the refresh cycle length based on whether all memory groups have been refreshed. Initially, a short refresh cycle is used to ensure all memory groups are refreshed promptly. After all memory groups are refreshed, the cycle is extended to a longer duration, reducing power consumption while maintaining data retention reliability.
Solution Approach 2:
The refresh operation is performed periodically with varying intervals. The system alternates between a first refresh cycle (shorter duration) and a second refresh cycle (longer duration) based on the refresh status of memory groups. This periodic variation ensures data retention while optimizing power consumption over time.
2Reliability
If the refresh cycle is shortened to ensure data retention, then data retention is improved, but power consumption increases
Solution Approach 1:
The refresh cycle duration is dynamically adjusted based on system state. Rather than maintaining a consistently short refresh cycle, the system transitions from a short first refresh cycle to a longer second refresh cycle after all memory groups are refreshed, thereby reducing overall power consumption while ensuring data retention during critical periods.
Solution Approach 2:
The system performs preliminary refresh operations at a short cycle to ensure all memory groups are refreshed and data is retained. Once this preliminary refresh is complete, the system transitions to a longer refresh cycle, as the critical data retention need has been addressed.
3Reliability
If refresh operation is executed frequently to prevent data loss, then data retention is ensured, but power consumption increases
Solution Approach 1:
The refresh operation frequency is varied periodically based on refresh needs. The system executes refresh operations at a higher frequency (short first refresh cycle) when memory groups need refreshing, then reduces frequency (longer second refresh cycle) after all groups are refreshed, optimizing the balance between data retention and power consumption.
Solution Approach 2:
Frequent refresh operations are performed initially as a preliminary action to ensure all memory groups are refreshed and data is securely retained. After this preliminary phase is complete, the refresh frequency is reduced, as the critical retention objective has been achieved.
Data Source
AI summary
Apparatuses and methods for refreshing memory cells of a semiconductor device are described. An example apparatus includes: a memory cell array including a plurality of memory groups each having a plurality of memory cells, the memory groups being selected by mutually different addresses; a first control circuit periodically executing a refresh operation on the memory groups in response to a first refresh command; and a second control circuit setting a cycle of executing the refresh operation by the first control circuit. The second control circuit sets the cycle to a first cycle until executing the refresh operation to all the memory groups after receiving the first refresh command, and the second control circuit sets the cycle to a second cycle that is longer than the first cycle after executing the refresh operation to all the memory groups.