Dynamic Register File Sharing via Status Control Registers
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Solution Overview
Problem
In hardware multi-thread systems, the static architected register space for each thread leads to resource wastage as threads are not operational simultaneously, limiting the utilization of processor resources.
Innovation Solution
A modified architected register file system where each thread's Status and Control Registers (SCR) are equipped with control bits allowing threads to access and utilize register files of other threads, thereby expanding the available register space.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If each thread has its own static architected register space, then thread isolation and simplicity are maintained, but resource utilization deteriorates when threads are not simultaneously operational
Solution Approach 1:
The patent introduces dynamic control mechanisms (control fields in SCR, control registers) that allow the register file assignment to change based on thread state. When a thread is inactive, its register files can be dynamically reassigned to active threads, transforming the static register allocation into a dynamic system that adapts to runtime conditions.
Solution Approach 2:
The patent makes register files universal by allowing them to serve multiple threads at different times. The same physical register files can be allocated to different threads based on operational needs, controlled through status and control registers. This multi-functional approach allows register files to serve both thread isolation purposes and resource sharing purposes.
2Reliability
If hardware multi-thread systems are implemented with separate register files for each thread, then thread independence is achieved, but the number of required architected registers increases
Solution Approach 1:
The patent merges the register files of multiple threads into a shared resource pool that can be dynamically allocated. Instead of maintaining completely separate physical register files for each thread, the system combines them under unified control through status and control registers, allowing active threads to access the combined register pool while maintaining logical thread independence.
Solution Approach 2:
The patent introduces status and control registers (SCR) as intermediary structures that mediate between threads and register files. These control structures manage the allocation and access rights, allowing threads to independently access register files through controlled interfaces without requiring completely separate physical register sets for each thread.
3Device complexity
If static architected register space is allocated to each thread, then implementation simplicity is maintained, but processor throughput deteriorates due to wasted resources
Solution Approach 1:
The patent implements feedback mechanisms through status registers that track thread operational states. This feedback information is used by the control logic to dynamically adjust register file allocation, allowing the system to respond to changing thread states and optimize resource utilization for improved throughput while maintaining manageable complexity through structured control.
Solution Approach 2:
The patent changes the parameter of register allocation from static to dynamic by introducing control fields and status registers. This parameter change allows the system to adjust register file assignment based on thread operational states, transforming the system from a simple but inefficient static allocation to a more complex but efficient dynamic allocation that improves throughput.
Data Source
AI summary
An apparatus, a method, and a computer program are provided for an architected register file system for multithread system. In conventional architected register file systems, a thread is only capable of utilizing a single register file. However, when register files of other thread are unused, the system resources are wasted. In the modified architected register file system, though, threads are enabled to utilize register files of other threads. The utilization of other thread registers is through the use of control fields added to a Status and Control Register (SCR) associated with each register file that enable and disable usage of other register files.