Memory Array Wake-Up Using Dynamic ROM Block Selection
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Solution Overview
Problem
Existing non-volatile data storage devices face issues with cumulative read disturb in ROM blocks during Power-On-Reset processes, leading to performance deterioration due to always using a single ROM block for retrieving operational information.
Innovation Solution
A device with multiple non-volatile memory sections that can randomly or deterministically select a starting section for each wake-up operation, allowing for proactive switching to distribute the load and reduce wear on specific sections, thereby improving speed, latency, and extending device life.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If a single ROM block is always used as the starting block to retrieve operational information during POR process, then the device complexity is reduced and ease of operation is improved, but cumulative read disturb occurs in that ROM block leading to reliability deterioration and performance degradation
Solution Approach 1:
The patent divides the ROM storage into multiple separate ROM blocks (first ROM block, second ROM block, etc.), each capable of storing operational information. Instead of always using a single ROM block, the system segments the storage function across multiple blocks and selectively accesses different blocks for POR operations, thereby distributing read disturbances and preventing any single block from suffering cumulative damage.
Solution Approach 2:
The patent introduces dynamic selection of the starting ROM block based on the wake-up source. Different ROM blocks are selected depending on whether the wake-up originates from deep sleep, light sleep, or other states. This dynamic approach replaces the static always-use-same-block strategy, optimizing both reliability and operational efficiency.
2Device complexity
If a single ROM block is always used as the starting block, then device complexity is reduced, but the duration of action of the ROM block deteriorates due to cumulative read disturb
Solution Approach 1:
The patent segments the ROM functionality into multiple independent ROM blocks, each capable of storing complete operational information. By distributing the read operations across multiple blocks based on wake-up sources, the system extends the effective duration of action for each individual block, preventing any single block from failing prematurely due to cumulative read disturb.
Solution Approach 2:
The patent changes the parameter of ROM block selection based on the wake-up source conditions. Different parameters (which ROM block to use) are selected dynamically according to the specific wake-up scenario, thereby optimizing the duration of action for each ROM block and extending overall system reliability.
3Ease of operation
If the controller always waits for a particular ROM block to fail before moving to another ROM block, then the ease of operation is simplified, but the productivity and speed of the wake-up process deteriorate
Solution Approach 1:
The patent performs preliminary assignment of different ROM blocks to different wake-up sources before actual operation. Each ROM block is pre-designated for specific wake-up scenarios, so when a wake-up event occurs, the controller can immediately access the appropriate pre-assigned block without waiting for failures or performing sequential searches. This preliminary organization dramatically improves wake-up speed and productivity.
Solution Approach 2:
The patent implements dynamic ROM block selection based on real-time wake-up source identification. Rather than following a fixed sequential search pattern, the controller dynamically determines which ROM block to access based on the specific wake-up conditions, thereby optimizing the productivity of the wake-up process while maintaining operational simplicity.
Data Source
AI summary
Disclosed is an apparatus including a memory device. The memory device includes a memory array, a number of non-volatile memory sections configured to store a copy of operational information for the memory array, and a controller coupled to the number of non-volatile memory sections. The controller can responsive to a first wake-up operation, select a first non-volatile memory section as a starting section to retrieve the copy of operational information. The controller can responsive to a second wake-up operation, select a second non-volatile memory section as the starting section to retrieve the copy of operational information without regard to success of a prior attempt to retrieve the copy of operational information.