Dynamic Routing Graph for Electronic Circuit Design Automation
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Solution Overview
Problem
Existing electronic circuit design systems require manual placement and routing of devices, which is tedious, time-consuming, and error-prone, especially due to the complexity of design rule checking, making fully automatic routing challenging.
Innovation Solution
A computer-implemented method that generates a routing graph based on design rules, dynamically updates it at a graphical user interface, and uses width spacing pattern tracks to identify pre-routed shapes, generate spacing influence regions, and analyze unoccupied space, providing an optimal via to satisfy design rule checks.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If manual placement and routing is used, then routing can be completed with full control over design rules, but the process becomes tedious, time-consuming, and error-prone
Solution Approach 1:
The patent segments the routing process into distinct phases: placement phase where devices are positioned, and routing phase where connections are established. The routing itself is segmented into identifying routing paths, generating routing segments, and updating the routing graph. This segmentation allows automated routing algorithms to handle the time-consuming aspects while maintaining design rule compliance through systematic checking at each segment.
Solution Approach 2:
The patent performs preliminary actions by pre-defining design rules, routing constraints, and spacing requirements before the actual routing process. The routing graph is pre-configured with all necessary routing layers, design rules, and spacing parameters. This preliminary setup enables the automated router to efficiently generate routes without repeatedly checking basic constraints during the routing process, reducing time while maintaining accuracy.
2Productivity
If fully automatic routing is implemented, then routing time is reduced, but it becomes very challenging to develop due to the complexity of design rule checking
Solution Approach 1:
The patent introduces an intermediary routing graph structure that mediates between the automated routing algorithm and the complex design rule checking system. The routing graph serves as an intermediate representation that captures routing state, constraints, and compliance information in a structured format. This intermediary layer simplifies the router's task by pre-organizing routing information and making design rule checks more manageable, thereby reducing router complexity while maintaining high productivity.
Solution Approach 2:
The patent employs parameter changes by dynamically adjusting routing parameters such as spacing requirements, track widths, and via constraints based on the specific design context. The system automatically modifies these parameters during the routing process to optimize route generation while ensuring design rule compliance. This approach allows the automated router to handle complexity through adaptive parameter adjustment rather than requiring overly complex algorithms.
3Adaptability or versatility
If manual routing is performed, then routing can be customized to specific design requirements, but human error increases and efficiency decreases
Solution Approach 1:
The patent implements feedback mechanisms where the routing system continuously monitors routing progress, checks compliance with design rules, and adjusts routing decisions accordingly. The routing graph provides real-time feedback on routing state, and the system automatically detects and corrects potential errors during the routing process. This feedback loop maintains high adaptability by allowing custom routing paths while reducing error rates through automated verification at each step.
4Productivity
If automated routing with design rule checking is implemented, then routing efficiency increases, but the complexity of ensuring compliance with all design rules increases
Solution Approach 1:
The patent segments design rule checking into modular components that operate at different stages of the routing process. Rather than performing comprehensive design rule checking on the entire design at once, the system checks routing compliance segment by segment as routes are generated. This segmentation maintains high routing speed by avoiding redundant checks while managing complexity through organized, staged verification processes.
Data Source
AI summary
Embodiments include herein are directed towards a method for electronic circuit design. Embodiments may include receiving, using a processor, an electronic design library including a plurality of design rules. Embodiments may include generating a routing graph, based upon, at least in part, the plurality of design rules, wherein the routing graph is a virtual representation of all of the available routing space for all routing layers associated with an electronic design. Embodiments may further include dynamically updating the routing graph at a graphical user interface, based upon, at least in part, a creation of a routing segment or a via at the graphical user interface.