Dynamic Sensing Time Adjustment for Memory Cell Verification

Solution Overview

Problem

Increasing bit error rates in multi-level cell flash memory devices due to inaccurate maintenance of data states and reduced feature dimensions, leading to increased errors in storage density.

Innovation Solution

Altering the sensing time in memory cells based on activation response values and subthreshold slope calculations to optimize verification levels and programming conditions, allowing for precise determination of threshold voltage levels and reducing errors.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If sensing time is extended to improve measurement precision of threshold voltage, then bit error rate increases due to programming condition misjudgment

Engineering Contradiction:

Improvethreshold voltage measurement precisionVSAvoidbit error rate

Core Design Contradiction:

Measurement precisionVSReliability

Solution Approach 1:

The sensing time is dynamically adjusted based on the verification stage: using a first sensing time for initial verification and a second sensing time for final verification. This dynamic adjustment resolves the contradiction by matching sensing duration to the specific verification requirements at each stage, preventing both premature termination that reduces precision and excessive extension that causes misjudgment.

Inventive Principle:

Principle #15Dynamics

Solution Approach 2:

The patent changes the sensing time parameter according to different verification conditions and memory cell types. By modifying this critical parameter based on program loop stage and cell characteristics, the system achieves optimal balance between measurement precision and reliability, avoiding the bit errors that occur with fixed sensing time settings.

Inventive Principle:

Principle #35Parameter changes

2Productivity

If sensing time is reduced to improve programming speed, then measurement precision of threshold voltage decreases

Engineering Contradiction:

Improveprogramming speedVSAvoidthreshold voltage measurement precision

Core Design Contradiction:

ProductivityVSMeasurement precision

Solution Approach 1:

The sensing time is dynamically adjusted based on the verification stage: using a first sensing time for initial verification and a second sensing time for final verification. This dynamic adjustment resolves the contradiction by matching sensing duration to the specific verification requirements at each stage, preventing both premature termination that reduces precision and excessive extension that causes misjudgment.

Inventive Principle:

Principle #15Dynamics

Solution Approach 2:

The patent applies different sensing time durations to different verification stages, using sufficient but not excessive sensing time for each stage. This partial action approach ensures adequate measurement precision for threshold voltage determination while avoiding the performance penalty of uniformly extended sensing time across all verification stages.

Inventive Principle:

Principle #16Partial or excessive action

3Device complexity

If uniform sensing time is used for all verification stages, then device complexity is reduced, but programming accuracy decreases due to cell responsiveness variations

Engineering Contradiction:

Improvesensing time control complexityVSAvoidprogramming accuracy

Core Design Contradiction:

Device complexityVSManufacturing precision

Solution Approach 1:

The sensing time is dynamically adjusted based on the verification stage: using a first sensing time for initial verification and a second sensing time for final verification. This dynamic adjustment resolves the contradiction by matching sensing duration to the specific verification requirements at each stage, preventing both premature termination that reduces precision and excessive extension that causes misjudgment.

Inventive Principle:

Principle #15Dynamics

Solution Approach 2:

The patent applies different sensing time parameters to different verification stages and memory cell types, recognizing that local conditions require localized solutions. By tailoring sensing time to specific verification needs and cell characteristics rather than applying a uniform setting, the system achieves high programming accuracy without excessive overall complexity.

Inventive Principle:

Principle #3Local quality

Data Source

PatentUS10636503B2Alteration of sensing time in memory cells

Publication Date: 2020.04.28 SANDISK TECHNOLOGIES LLC

AI summary

An apparatus includes a programming circuit configured to deliver a series of program loops to a memory cell. The apparatus further includes a sensing circuit configured to sense an electrical characteristic of the memory cell for a sensing time during each program loop. The apparatus also includes an alteration circuit configured to alter the sensing time of a subsequent program loop in response to a programming condition.