Dynamic Shard Creation for Graph Workload Storage

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Solution Overview

Problem

The significant performance bottleneck in graph applications is the enormous graph size and the random input/output access pattern, leading to high IO latency due to random disk access, even with fast NVME devices.

Innovation Solution

The system employs a controller processor to merge graph data elements into merged dynamic shards, which are stored in non-volatile memory, optimizing data access by grouping sub-portions of data elements into shards and reassigning vertex IDs for more efficient storage and processing.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If standard sparse graph formats (CSR/CSC) are used for storage, then graph data can be stored on disk, but random IO access pattern leads to high IO latency

Engineering Contradiction:

Improvedata storage capabilityVSAvoidIO latency

Core Design Contradiction:

ReliabilityVSLoss of time

Solution Approach 1:

The patent segments the graph data into multiple shards, where each shard contains a portion of the graph data elements. This segmentation allows the system to access only the relevant shards during graph processing operations, converting random access across the entire graph into sequential access across a smaller number of shards, thereby reducing IO latency while maintaining data storage capability

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The patent implements dynamic shard creation and merging based on the working set size requirements of graph algorithms. The system dynamically adjusts the number and size of shards during different processing stages, optimizing the balance between memory residency and disk storage. This dynamic adaptation allows the system to maintain optimal performance across different graph workloads and data sizes

Inventive Principle:

Principle #15Dynamics

2Quantity of substance

If graph data is stored on disk due to size exceeding DRAM capacity, then storage is achieved, but random access patterns cause performance bottlenecks

Engineering Contradiction:

Improvegraph data sizeVSAvoidprocessing efficiency

Core Design Contradiction:

Quantity of substanceVSProductivity

Solution Approach 1:

The patent performs preliminary actions by pre-sorting and pre-grouping graph data elements into shards based on their access patterns and relationships. Vertex IDs and edge lists are pre-organized within shards to enable sequential access during processing. This preliminary organization eliminates the need for random access during actual graph computations, significantly improving processing efficiency while accommodating large graph sizes on disk

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The patent changes the storage parameter organization by transforming the traditional CSR/CSC formats into a shard-based structure with modified indexing. The system introduces shard-level and element-level indexing parameters that enable efficient location and access of graph elements within shards. This parameter transformation maintains the ability to store large graphs on disk while improving access patterns to be more sequential and predictable

Inventive Principle:

Principle #35Parameter changes

3Speed

If NVME devices are used for storage, then storage speed is improved, but random read/write speed is still lower than sequential access speed

Engineering Contradiction:

Improvestorage device speedVSAvoidrandom access time

Core Design Contradiction:

SpeedVSLoss of time

Solution Approach 1:

The patent merges multiple small random access operations into larger sequential access operations by organizing graph data into contiguous shards. Instead of accessing scattered data elements individually across the storage device, the system loads entire shards sequentially into memory, where they can be processed efficiently. This merging of access operations leverages the high sequential access speed of NVME devices while avoiding their slower random access performance

Inventive Principle:

Principle #5Merging (Combining)

Data Source

PatentUS12271363B2Optimal dynamic shard creation in storage for graph workloads

Publication Date: 2025.04.08 SAMSUNG ELECTRONICS CO LTD

AI summary

According to one general aspect, an apparatus may include a host processor interface circuit configured to communicate data and commands with an external host processor circuit. The apparatus may include a controller processor circuit configured to merge graph data elements into merged dynamic shards, wherein the merged dynamic shards include the same number of graph data elements. The apparatus may include a non-volatile memory configured to store data in an at least a partial graph structure, wherein the graph structure includes data elements that each include vertexes and an edge, and wherein sub-portions of the data elements are grouped into shards.