Dynamic SIMD Clock Gating for GPU Power Reduction
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Solution Overview
Problem
Conventional graphics processors waste power by maintaining clock signals for all SIMD units simultaneously, even when not all are assigned work, leading to inefficient power consumption and performance.
Innovation Solution
Implement dynamic control and clock gating of individual SIMDs in a shader complex, allowing for on-the-fly activation and deactivation based on workload, temperature, and performance requirements, using register configurations to manage clock signals and reduce power usage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If all SIMD units are clocked simultaneously, then performance is maintained, but power consumption increases
Solution Approach 1:
The patent segments the clocking control at the SIMD level rather than treating all SIMD units uniformly. Individual SIMDs can be clocked independently based on their workload status, allowing the system to segment power distribution and maintain performance only where needed.
Solution Approach 2:
The patent implements dynamic clocking control where the clocking state of each SIMD can change over time based on workload requirements. The system transitions from static all-or-nothing clocking to dynamic per-SIMD clocking, enabling the system to adapt power consumption to actual performance needs.
2Power
If SIMDs are statically enabled or disabled, then power consumption is reduced, but the graphics pipe must be flushed and reprogrammed
Solution Approach 1:
The patent enables dynamic SIMD enabling/disabling without pipeline flush by using runtime control mechanisms. The system can change SIMD operational state during execution without requiring pipeline reset, eliminating the time loss associated with static reconfiguration.
Solution Approach 2:
The patent introduces an intermediary control mechanism (such as a control register or management unit) that mediates between the power management system and the SIMD units. This intermediary allows state changes to be communicated to SIMDs without requiring pipeline flush, acting as a buffer that decouples power control from pipeline operations.
3Productivity
If clock signals are provided to all SIMDs, then all SIMDs can execute work, but unused SIMDs waste power
Solution Approach 1:
The patent applies local quality control by treating each SIMD differently based on its specific workload status. Instead of uniform treatment, each SIMD receives clock signals according to its individual needs, allowing high utilization of active SIMDs while powering down unused ones.
Solution Approach 2:
The patent implements feedback mechanisms that monitor SIMD workload status and adjust clocking accordingly. The system receives feedback about which SIMDs are busy and which are idle, then uses this information to dynamically control clock signals, ensuring power is only provided to SIMDs that need it.
Data Source
AI summary
Systems and methods to improve performance in a graphics processing unit are described herein. Embodiments achieve power saving in a graphics processing unit by dynamically activating/deactivating individual SIMDs in a shader complex that comprises multiple SIMD units. On-the-fly dynamic disabling and enabling of individual SIMDs provides flexibility in achieving a required performance and power level for a given processing application. Embodiments of the invention also achieve dynamic medium grain clock gating of SIMDs in a shader complex. Embodiments reduce switching power by shutting down clock trees to unused logic by providing a clock on demand mechanism. In this way, embodiments enhance clock gating to save more switching power for the duration of time when SIMDs are idle (or assigned no work). Embodiments can also save leakage power by power gating SIMDs for a duration when SIMDs are idle for an extended period of time.