Dynamic Slice Assignment for Distributed Storage Latency

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Solution Overview

Problem

Distributed storage systems face inefficiencies due to fixed slice assignments, leading to processing bottlenecks and reduced throughput when handling high availability events, as they fail to dynamically adjust to variations in storage node capacities and latency.

Innovation Solution

Implementing dynamic slice assignment in distributed storage systems, where a processing device monitors latencies across nodes, detects imbalances, and adjusts the assignment of logical address space slices to optimize IO processing by redistributing slices from high-latency nodes to low-latency nodes, using adaptive flow control mechanisms to maintain maximum processing latency guarantees.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If fixed slice assignment is used in distributed storage systems, then system simplicity is maintained, but processing throughput decreases due to bottlenecks during high availability events

Engineering Contradiction:

ImproveIO processing throughputVSAvoidslice assignment mechanism complexity

Core Design Contradiction:

ProductivityVSDevice complexity

Solution Approach 1:

The patent implements dynamic slice assignment that automatically adjusts slice distribution across storage nodes based on real-time latency conditions. When high availability events occur, the system detects increased latency on affected nodes and dynamically redistributes slices to maintain balanced processing throughput, transforming the static assignment into an adaptive mechanism that responds to system conditions.

Inventive Principle:

Principle #15Dynamics

Solution Approach 2:

The system incorporates feedback mechanisms that continuously monitor latency metrics across storage nodes and use this information to adjust slice assignment decisions. The feedback loop detects when nodes experience high latency due to HA events and triggers reallocation of slices away from affected nodes, enabling the system to self-correct and maintain optimal throughput without external intervention.

Inventive Principle:

Principle #23Feedback

2Productivity

If slices are evenly distributed across storage nodes, then load balance is maintained under normal conditions, but processing bottlenecks occur during high availability events

Engineering Contradiction:

ImproveIO processing throughputVSAvoidlatency guarantee consistency

Core Design Contradiction:

ProductivityVSReliability

Solution Approach 1:

The patent changes the distribution parameter of slice assignment from a fixed even distribution to a dynamic distribution based on latency parameters. When latency on certain nodes exceeds thresholds due to HA events, the system modifies the assignment parameters to reduce the number of slices on affected nodes and redistribute them to nodes with normal latency, thereby maintaining throughput and latency guarantees.

Inventive Principle:

Principle #35Parameter changes

Solution Approach 2:

The slice assignment transitions from a static even distribution to a dynamic allocation that adapts to changing system conditions. During HA events, the system dynamically adjusts the number of slices assigned to each node based on real-time latency measurements, preventing bottlenecks while maintaining overall system reliability and throughput.

Inventive Principle:

Principle #15Dynamics

3Productivity

If storage nodes experience high latency during HA events, then processing reliability is maintained, but overall system throughput decreases due to bottleneck formation

Engineering Contradiction:

Improvesystem IO throughputVSAvoidprocessing latency

Core Design Contradiction:

ProductivityVSLoss of time

Solution Approach 1:

The patent extracts the problematic workload (slices) from storage nodes experiencing high latency during HA events and relocates them to nodes with normal processing performance. This extraction prevents the formation of processing bottlenecks and maintains overall system throughput by isolating the affected nodes from the critical data path.

Inventive Principle:

Principle #2Taking out (Extraction)

Solution Approach 2:

The system introduces an intermediary mechanism that monitors latency conditions and mediates slice assignment decisions. When HA events cause latency increases on certain nodes, the intermediary detects these conditions and redirects slice assignments through alternative nodes, effectively bypassing the bottlenecked nodes and maintaining system throughput.

Inventive Principle:

Principle #24Intermediary (Mediator)

Data Source

PatentUS11687245B2Dynamic slice assignment in a distributed storage system

Publication Date: 2023.06.27 EMC IP HLDG CO LLC

AI summary

An apparatus comprises at least one processing device that includes a processor coupled to a memory, and is configured to monitor latencies associated with processing of input-output operations in a plurality of storage nodes of a distributed storage system, to detect an unbalanced condition between the storage nodes based at least in part on the monitored latencies, and responsive to the detected unbalanced condition, to adjust an assignment of slices of a logical address space of the distributed storage system to the storage nodes. Adjusting the assignment of slices of the logical address space of the distributed storage system to the storage nodes responsive to the detected unbalanced condition illustratively comprises increasing a number of the slices assigned to one or more of the storage nodes having relatively low latencies and decreasing a number of slices assigned to one or more of the storage nodes having relatively high latencies.