Dynamic Storage Allocation via Hierarchical Mapping Segmentation
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Solution Overview
Problem
In storage systems, microprocessors without ownership of the storage device where address mapping information is stored cannot access this information, leading to performance deterioration, and frequent accesses to inferior access performance storage devices further degrade the system's performance.
Innovation Solution
Assigning a first real data storage area (page) to a virtual storage area and a second real data storage area (track) within the page, with address mapping information stored in a shared memory and cache control information stored in the microprocessor's local memory, enabling efficient access.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If address mapping information is stored in a storage device with inferior access performance, then the microprocessor can access the information, but the access performance of the whole system is deteriorated
Solution Approach 1:
The patent segments address mapping information into two levels: first-level mapping information (virtual volume to physical volume) stored in shared memory accessible by all microprocessors, and second-level mapping information (physical volume to real data storage area) stored in the virtual storage area itself. This segmentation allows microprocessors to access frequently used first-level mapping information quickly from shared memory while maintaining the ability to access second-level information when needed.
Solution Approach 2:
The patent merges the storage of first-level address mapping information into the shared memory system that all microprocessors can access, rather than storing it separately in a dedicated storage device. This merging allows microprocessors to access mapping information without crossing ownership boundaries, improving access performance while reducing system complexity.
2Ease of operation
If the microprocessor has ownership of the storage device where address mapping information is stored, then it can access the information, but the performance is deteriorated due to crossing over ownership
Solution Approach 1:
The patent introduces shared memory as an intermediary storage location for first-level address mapping information. Instead of requiring direct ownership of the storage device, microprocessors can access mapping information through the shared memory system, which mediates the access without ownership constraints. This intermediary approach maintains ease of operation while improving microprocessor performance by eliminating ownership crossing overhead.
3Adaptability or versatility
If address mapping information is stored in a dispersed manner in storage devices, then the system can handle multiple virtual storage areas, but the accesses to address mapping information increase and performance is deteriorated
Solution Approach 1:
The patent changes the storage dimension of address mapping information from dispersed storage across multiple storage devices to centralized storage in shared memory for first-level mapping information. This dimensional change allows the system to maintain adaptability for managing multiple virtual storage areas while improving productivity by reducing the number of accesses needed and concentrating mapping information in a high-performance storage location accessible by all microprocessors.
Data Source
AI summary
The present invention aims at preventing the access performance of a distributed memory system by accessing via cross-over ownership a track mapping information formed as a hierarchical memory. In the process of assigning a real data storage area to a virtual volume, at first, a page from a pool is assigned, and thereafter, a track is assigned from said page. The page is composed of multiple tracks into which track data assigned at host write operation timings are stored sequentially from the top. A mapping information of the virtual volume and the page is stored in a control information page that differs from the track data, and the mapping information is stored in the control information page which could only be accessed by a microprocessor having the ownership of the virtual volume.