Dynamic Storage Remapping for Concurrent Processor Tasks

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Solution Overview

Problem

Existing data processing techniques face inefficiencies in handling and accessing data due to idle time and storage size limitations, particularly in tasks involving neural network and graphics processing.

Innovation Solution

A processor with a handling unit dynamically remaps storage between tasks, identifying available portions for simultaneous data storage and mapping logical to physical addresses, allowing tasks to be performed concurrently without waiting for one task to finish.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If traditional sequential storage allocation is used, then storage management is simple, but processor idle time increases and task execution efficiency decreases

Engineering Contradiction:
Improvetask execution efficiencyVSAvoidprocessor idle time
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The system performs preliminary identification of available storage portions before tasks need them. The handling unit proactively determines which storage portions are available during execution of the first task, and pre-establishes mappings for second task data, so that when the second task needs storage, the allocation is already ready, eliminating waiting time.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The storage allocation system transitions from static sequential allocation to dynamic real-time allocation. The handling unit continuously monitors storage availability during task execution and dynamically remaps logical addresses to physical addresses based on real-time storage status, allowing flexible adaptation to changing storage conditions without processor idle time.

Inventive Principle:
Principle #15Dynamics

2Adaptability or versatility

If larger storage is provided to avoid allocation conflicts, then task concurrency is improved, but storage size increases

Engineering Contradiction:
Improvetask concurrency capabilityVSAvoidstorage size
Core Design Contradiction:
Adaptability or versatilityVSVolume of stationary object

Solution Approach 1:

The system changes the parameter of storage allocation from fixed block allocation to dynamic address mapping. By modifying how storage addresses are assigned (through logical to physical address remapping) rather than changing the physical storage structure, the system enables task concurrency without increasing storage volume.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The same storage portions serve multiple tasks at different times. The handling unit enables storage portions to be reused for different tasks by establishing new mappings, allowing one storage portion to be universally used for both first task and second task at different moments, reducing the total storage needed for concurrency.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS12498976B2Data storage
Publication Date: 2025.12.16 ARM LTD
  • US12498976B2 patent drawing
  • US12498976B2 patent drawing
  • US12498976B2 patent drawing

AI summary

A processor to execute a plurality of tasks comprising a first task and a second task. At least a part of the first task is to be executed simultaneously with at least a part of the second task. The processor comprises a handling unit to: determine an available portion of a storage available during execution of the part of the first task; determine a mapping between at least one logical address associated with data associated with the part of the second task and a corresponding at least one physical address of the storage corresponding to the available portion; and identify, based on the mapping, the at least one physical address corresponding to the at least one logical address associated with the data, for storing the data in the available portion of the storage.