Dynamic-Supply Level Conversion Circuits for Faster Voltage Shifting
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Solution Overview
Problem
Conventional voltage level conversion mechanisms in electronic interfaces and charge recycling fabrics are constrained by the gate-to-source voltage of pull-down and pull-up transistors, limiting the operational frequency range and efficiency of signal propagation between different voltage domains.
Innovation Solution
The use of PMOS and NMOS devices as pull-down and pull-up transistors, respectively, with dynamically changing gate voltages through inverters, allows for increased gate-to-source voltage, enabling faster level conversion by ensuring the transistors are effectively switched off in the inactive state, thus overcoming the limitations of conventional mechanisms.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If conventional NMOS pull-down or PMOS pull-up transistors are used for level conversion, then the circuit structure is simple, but the level conversion speed is constrained by the gate-to-source voltage with respect to the magnitude of the lower supply voltage
Solution Approach 1:
The patent applies dynamics by making the supply voltage to the inverter dynamic rather than fixed. The inverter supply voltage changes based on the voltage domain being converted from, allowing the gate-to-source voltage of the pull-down transistor to be maximized for each input voltage level. This dynamic adjustment enables faster level conversion speed while managing circuit complexity through intelligent voltage control.
2Productivity
If the gate-to-source voltage is increased to improve level conversion speed, then the operational frequency range increases, but the transistor switching control becomes more difficult
Solution Approach 1:
The patent implements feedback by using the output of the inverter to control the gate voltage of the pull-down transistor. The inverter's output automatically adjusts the control voltage based on the input signal state, ensuring proper transistor switching without requiring external control circuits. This feedback mechanism simplifies the control aspect while enabling high operational frequencies through optimized gate-to-source voltage.
3Speed
If dynamically changing gate voltages are applied to increase gate-to-source voltage, then level conversion speed is enhanced, but the circuit requires level-dependent inverter supply voltages
Solution Approach 1:
The patent applies universality by designing the inverter to serve multiple functions: it acts as both a signal inverter and a voltage-level adapter. The same inverter circuit structure handles different voltage domains (Vdd1 and Vdd2) by dynamically adjusting its supply voltage, eliminating the need for separate control circuits for each voltage level and simplifying the overall device complexity.
Data Source
AI summary
Voltage level conversion circuits include PMOS pull-down devices or NMOS pull-up devices, and inverters with outputs that determine gate voltages of these devices. The inverters are powered by moving supply voltages, for example complementary supply voltages generated from a pair of cross-coupled inverters. The cross-coupled inverters may implement a data storage latch with the moving supply voltages generated from the internal data storage nodes of the latch.