Dynamic Thread Switching in Multi-threaded Processor Arithmetic Units
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Solution Overview
Problem
In multithreaded processors, when an execution cycle of an instruction for one thread is long, it leads to other threads being in a standby state for an extended period, resulting in a significant decrease in quality of service (QoS) due to exclusive use of a single arithmetic unit by the long-running thread.
Innovation Solution
The arithmetic processing device includes an instruction decoder, a reservation station, and a first arithmetic unit that outputs a use inability signal when the execution cycle exceeds a threshold, allowing the controller to discontinue execution, store the state, and restart when conditions are met, ensuring that the first arithmetic unit is used exclusively for complex instructions and freeing it for other threads when necessary.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a single arithmetic unit executes instructions of a single thread exclusively, then the instruction can be completed accurately, but other threads must wait in standby state for long time
Solution Approach 1:
The patent implements dynamic thread switching mechanism where the arithmetic unit can switch between executing instructions of different threads based on execution cycle thresholds. When a thread's instruction execution exceeds a predetermined threshold, the system switches to another thread, making the resource allocation dynamic rather than static, thus resolving the contradiction between ensuring accurate execution and reducing standby time.
Solution Approach 2:
The system employs periodic evaluation of execution cycles to determine whether to switch threads. By monitoring the execution cycle count periodically and comparing it against thresholds, the system creates a rhythmic pattern of execution and switching that prevents any single thread from monopolizing the arithmetic unit for excessive durations, thereby reducing overall standby time while maintaining execution reliability.
2Duration of action of moving object
If a thread uses a single arithmetic unit exclusively for a long execution cycle, then the instruction can be completed, but quality of service of other threads decreases significantly
Solution Approach 1:
The patent introduces dynamic thread scheduling that adjusts the execution duration based on predefined thresholds. Instead of allowing indefinite exclusive use, the system dynamically switches threads when the execution cycle reaches the threshold, ensuring that no single thread can dominate the arithmetic unit for excessively long periods, thus maintaining productivity across multiple threads.
Solution Approach 2:
The system changes the operational parameters of the arithmetic unit by switching between different threads based on execution cycle parameters. When the execution cycle parameter exceeds a threshold, the system changes the active thread parameter, allowing the arithmetic unit to serve multiple threads in a time-multiplexed manner, thereby maintaining overall system productivity.
3Productivity
If the arithmetic unit switches between multiple threads frequently, then quality of service of all threads improves, but the complexity of managing execution states increases
Solution Approach 1:
The patent implements state copying mechanisms where execution states of different threads are stored in separate storage units. When switching between threads, the system copies or restores states from these storage units rather than maintaining complex inter-thread state management, simplifying the switching process while enabling frequent thread transitions to maintain quality of service.
Solution Approach 2:
The system segments the execution state management by allocating dedicated storage resources for each thread's execution state. This segmentation allows independent management of each thread's state without interference, reducing the overall complexity of multi-thread state management while enabling efficient switching to maintain high productivity across all threads.
Data Source
AI summary
A first entry, when outputting an instruction stored in the first entry to a first arithmetic unit and when an execution cycle number of the instruction stored in the first entry is equal to or more than a threshold value, outputs a use inability signal of the first arithmetic unit to a second entry, a reservation station includes a controller configured to, when the use inability signal of the first arithmetic unit is output and then a use inability discontinuation condition is satisfied, perform control to discontinue execution of the first arithmetic unit, store a state of the first arithmetic unit in a storage element, and discontinue output of the use inability signal of the first arithmetic unit, and the second entry, when output of the use inability signal of the first arithmetic unit is discontinued, outputs an instruction stored in the second entry to the first arithmetic unit.