Dynamic Throttling of Parallel Sub-I/O Requests
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Solution Overview
Problem
Data storage systems face inefficiencies in processing host I/O requests due to serial handling of sub-I/O requests, which can lead to suboptimal performance and increased response times, especially when dealing with 'thin' logical units where underlying storage is allocated on an as-needed basis.
Innovation Solution
The technique involves issuing multiple sub-I/O requests concurrently based on mapping information, with dynamic throttling to optimize concurrency and reordering of transfer responses to maintain address ordering, allowing for efficient data transfer and improved performance by utilizing a host-side interface and device-side interface within the data storage system.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If multiple sub-I/O requests are issued concurrently for extents of underlying storage, then performance is improved and response times are reduced, but system complexity increases and resource management becomes more difficult
Solution Approach 1:
The patent segments a single host I/O request into multiple sub-I/O requests directed to different extents of underlying storage. This segmentation enables parallel processing of storage operations across multiple extents while maintaining the ability to manage each sub-request independently, thus improving performance without overwhelming system complexity
Solution Approach 2:
The patent introduces an intermediary mapping layer that translates host I/O requests into multiple sub-I/O requests. This mapping mechanism acts as a mediator that manages the complexity of concurrent requests by providing a structured way to map logical block addresses to physical extents, handling reordering and coordination without requiring complex direct management of parallel operations
2Productivity
If sub-I/O requests are processed in parallel, then throughput is improved, but maintaining address ordering becomes more difficult and may require re-ordering logic
Solution Approach 1:
The patent applies preliminary action by pre-establishing the mapping between logical block addresses and physical extents before processing I/O requests. This pre-computed mapping information is stored and used to determine the correct order of operations, allowing parallel execution while ensuring that results can be re-ordered correctly without complex real-time coordination
Solution Approach 2:
The patent implements feedback mechanisms where completion status and ordering information from parallel sub-I/O requests are monitored and used to re-order results. The system receives feedback about which extents have been processed and uses this information to maintain proper address ordering in the final data transfer, enabling parallel processing while preserving sequential integrity
3Productivity
If the number of concurrent sub-I/O requests is increased, then performance improves, but response time variability increases and system stability may deteriorate
Solution Approach 1:
The patent applies dynamics by making the number of concurrent sub-I/O requests adjustable rather than fixed. The system can dynamically control the degree of parallelism based on system conditions, workload characteristics, and performance requirements, allowing optimization of both throughput and response time consistency by adapting concurrency levels to match operational needs
Data Source
AI summary
A method in a data storage system includes receiving a host I/O request from a host-side interface specifying a range of logical block addresses (LBAs) of a mapped logical storage unit (MLU) mapped through a device-side interface to underlying units of storage. Mapping information is obtained for extents of the underlying logical storage units mapped to sub-ranges of the range of LBAs. Sub-I/O requests for the extents are concurrently issued to the device-side interface based on the mapping information, subject to a throttling mechanism to manage performance. The device-side interface provides transfer initiation responses to initiate transfer of the extents, the responses being forwarded to the host-side interface to cause the host-side interface to transfer the extents in a transfer phase. The transfer initiation responses may be re-ordered as necessary to enable the host-side interface to transfer the extents in address order in satisfaction of the host I/O request.


