Dynamic Transistor Sizing for Feedthrough Noise Reduction
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Solution Overview
Problem
Feedthrough noise in transistor switches affects signal accuracy and display quality due to unequal parasitic capacitors in P-type and N-type transistors, leading to charge injection and discharge issues when the switch is turned off, especially at varying input voltages.
Innovation Solution
A circuit device with a transfer gate comprising P-type and N-type transistors in parallel, where the control circuit dynamically adjusts the transistor size ratio based on the input signal voltage range to balance parasitic capacitors, reducing feedthrough noise by setting the ratio differently for high and low voltage ranges.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If equal transistor size is used for P-type and N-type transistors in a transfer gate, then the structure is simple and manufacturing is easy, but feedthrough noise cannot be effectively reduced because parasitic capacitors fluctuate unequally with voltage changes
Solution Approach 1:
The patent applies dynamics by making the transistor size ratio adjustable based on input voltage conditions. The control circuit dynamically selects between first and second transistor size ratios depending on whether the input voltage is in a first or second voltage range, allowing the system to adapt to varying voltage conditions and optimize feedthrough noise reduction accordingly
Solution Approach 2:
The patent changes the transistor size ratio parameter based on input voltage ranges. When input voltage is in the first voltage range, a first transistor size ratio is used; when in the second voltage range, a second transistor size ratio is used. This parameter change allows the parasitic capacitors to be balanced differently for different voltage conditions, effectively reducing feedthrough noise
2Device complexity
If fixed transistor size ratio is used in the transfer gate, then the circuit structure is simple, but signal accuracy deteriorates due to voltage-dependent feedthrough noise variations
Solution Approach 1:
The control circuit dynamically adjusts the transistor size ratio based on the input signal voltage range. By detecting whether the input voltage falls in the first or second voltage range and accordingly selecting the appropriate transistor size ratio, the system maintains high signal accuracy across different voltage conditions without requiring overly complex circuit structures
3Reliability
If equal parasitic capacitors are assumed for P-type and N-type transistors, then charge injection and discharge can be balanced, but this assumption fails when input voltage varies because parasitic capacitors fluctuate differently with voltage
Solution Approach 1:
The patent changes the transistor size ratio parameter according to different voltage ranges. When input voltage is in the first voltage range, the first transistor size ratio balances the parasitic capacitors; when in the second voltage range, the second transistor size ratio balances them differently. This ensures charge injection and discharge remain balanced across varying voltage conditions
Solution Approach 2:
The patent applies different transistor size ratios for different voltage ranges, making the system's characteristics locally optimized for each operating condition. The first transistor size ratio is optimized for the first voltage range, while the second transistor size ratio is optimized for the second voltage range, ensuring reliable charge balance in each local operating region
Data Source
AI summary
A circuit device includes a transfer gate and a control circuit. The transfer gate includes a P-type transistor and an N-type transistor. The control circuit sets, as a first value, a transistor size ratio that is a ratio of a size of the P-type transistor to a size of the N-type transistor when a voltage of an input signal to the transfer gate is in a first voltage range at a timing at which the transfer gate is turned off. The control circuit sets the transistor size ratio as a second value greater than the first value when a voltage of the input signal is in a second voltage range lower than that in the first voltage range at a timing at which the transfer gate is turned off.