Dynamic Trim Management for Memory Calibration

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Solution Overview

Problem

Traditional memory systems face inefficiencies in processing level calibration due to unnecessary testing across memory devices, leading to increased manufacturing time and resource consumption, as they calibrate all trims until the slowest converging device satisfies the test condition, rather than dynamically managing the optimization trim list.

Innovation Solution

Implementing a dynamic trim management mechanism that continuously samples and calculates feedback measures for read levels, allowing for iterative calibration of individual read levels and optimizing the subset of trims, thereby reducing the number of reads necessary and eliminating calibrated trims from the testing process.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If traditional memory systems calibrate all trims until the slowest converging device satisfies the test condition, then calibration reliability is improved, but manufacturing time and resource consumption increase

Engineering Contradiction:
Improvecalibration reliabilityVSAvoidmanufacturing time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent implements dynamic trim management where the calibration process adapts in real-time based on device characteristics. The system continuously monitors calibration progress and dynamically adjusts the trim list, removing calibrated trims and focusing resources on non-converged trims. This dynamic approach allows the system to maintain high calibration reliability while significantly reducing manufacturing time by avoiding unnecessary calibration of already-converged devices.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent applies local quality by treating different memory devices and trims individually based on their specific calibration needs. Instead of uniform calibration across all devices, the system identifies and focuses calibration efforts on specific trims that require attention (non-converged trims), while skipping those that have already met calibration criteria. This localized approach ensures reliability for critical trims while eliminating waste on already-calibrated ones.

Inventive Principle:
Principle #3Local quality

2Reliability

If traditional memory systems calibrate all trims across all devices, then comprehensive calibration coverage is improved, but resource consumption increases

Engineering Contradiction:
Improvecalibration coverageVSAvoidresource consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent extracts and removes calibrated trims from the active calibration list once they satisfy test conditions. By taking out these successfully calibrated trims from further processing, the system maintains comprehensive calibration coverage for remaining trims while eliminating unnecessary resource consumption on already-calibrated trims. This extraction mechanism ensures that resources are focused only where needed.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent implements partial action by calibrating only the necessary subset of trims that require calibration at any given time, rather than continuously calibrating all trims across all devices. The system performs calibration on non-converged trims and stops when calibration criteria are met, avoiding excessive calibration actions on already-satisfied devices and trims, thereby reducing resource consumption while maintaining adequate coverage.

Inventive Principle:
Principle #16Partial or excessive action

3Measurement precision

If traditional memory systems test all trims until slowest device converges, then calibration accuracy is improved, but productivity decreases

Engineering Contradiction:
Improvecalibration accuracyVSAvoidmanufacturing productivity
Core Design Contradiction:
Measurement precisionVSProductivity

Solution Approach 1:

The patent performs preliminary calibration actions on trims that are likely to converge quickly or have already converged, identifying and removing them from the calibration list before they would slow down the overall process. By taking preliminary actions to identify and exclude easily-calibrated trims, the system maintains calibration accuracy for difficult trims while improving overall manufacturing productivity by eliminating bottlenecks.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent implements skipping by rapidly identifying and bypassing trims that have already converged or are unlikely to require extensive calibration. The system rushes through the identification and removal of calibrated trims from the list, allowing the calibration process to focus efficiently on remaining non-converged trims. This skipping mechanism maintains accuracy for critical trims while dramatically improving productivity by eliminating time spent on already-satisfied devices.

Inventive Principle:
Principle #21Skipping (Rushing through)

Data Source

PatentUS11721399B2Memory system with dynamic calibration using a trim management mechanism
Publication Date: 2023.08.08 MICRON TECHNOLOGY INC
  • US11721399B2 patent drawing
  • US11721399B2 patent drawing
  • US11721399B2 patent drawing

AI summary

A system comprises a memory device comprising a plurality of memory cells; and a processing device coupled to the memory device, the processing device configured to manage optimization target data that at least initially includes read levels in addition to a target trip, wherein the optimization data is managed based on iteratively calibrating the read levels and removing the calibrated levels from the optimization target data.