Dynamic Truncation Multiplication Circuit for Energy Efficiency

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Solution Overview

Problem

Mobile computing devices face significant energy consumption challenges due to high energy demands of specialized hardware multipliers required for high-speed multiplication operations, which affect battery life and size constraints.

Innovation Solution

A hardware multiplier circuit dynamically truncates operands to reduce energy consumption by selecting a subset of bits based on the leading non-sign bit, allowing for smaller multiplier sizes while preserving computationally important bits, and using fixed-point multipliers with reduced operand lengths.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If a full-size hardware multiplier is used to maintain high multiplication speed, then productivity is improved, but energy consumption increases

Engineering Contradiction:
Improvemultiplication speedVSAvoidenergy consumption
Core Design Contradiction:
ProductivityVSUse of energy by moving object

Solution Approach 1:

The patent extracts only the most significant bits (MSBs) of the operands using dynamic truncation based on leading one detection, rather than processing all bits. This selective extraction allows using a smaller multiplier that consumes less energy while still achieving acceptable accuracy for the application

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent implements dynamic operand truncation where the number of bits to be processed is determined at runtime based on the actual input values (using leading one detection). This dynamic adaptation allows the system to process fewer bits when possible, reducing energy consumption while maintaining productivity when full precision is needed

Inventive Principle:
Principle #15Dynamics

2Use of energy by moving object

If operand bits are truncated to reduce multiplier size, then energy consumption decreases, but measurement precision deteriorates

Engineering Contradiction:
Improveenergy consumptionVSAvoidmultiplication accuracy
Core Design Contradiction:
Use of energy by moving objectVSMeasurement precision

Solution Approach 1:

The patent applies local quality by focusing computational resources on the most significant bits of the operands, which contribute most to the final result accuracy. Less significant bits are truncated, creating a non-uniform processing approach that optimizes the trade-off between precision and energy consumption

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent changes the parameter of operand bit length dynamically based on the input values. By detecting the leading one position and adjusting the effective operand width, the system adapts the precision level to match the actual requirements of each computation, reducing energy consumption while maintaining necessary accuracy

Inventive Principle:
Principle #35Parameter changes

3Use of energy by moving object

If dynamic truncation is implemented to improve energy efficiency, then use of energy decreases, but device complexity increases

Engineering Contradiction:
Improveenergy consumptionVSAvoidmultiplier circuit complexity
Core Design Contradiction:
Use of energy by moving objectVSDevice complexity

Solution Approach 1:

The patent segments the operand processing into two parts: dynamic truncation logic that determines the effective bit width, and a smaller fixed-point multiplier that processes only the relevant bits. This segmentation allows the complex dynamic adaptation to be separated from the multiplication core, managing overall device complexity

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS9639328B2Multiplication circuit providing dynamic truncation
Publication Date: 2017.05.02 WISCONSIN ALUMNI RES FOUND
  • US9639328B2 patent drawing
  • US9639328B2 patent drawing
  • US9639328B2 patent drawing

AI summary

A fixed-point multiplier providing reduced energy usage dynamically truncates received operands according to the location of computationally important bits in the operands and provides the truncated operands to a reduced width multiplier offering reduced energy usage. Information about the location of the dynamic truncation is used to properly shift the result of the multiplier to provide an approximation of full multiplication of the operands.