Dynamic Via Correction for Die Pad Shift in RDL Lithography

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Solution Overview

Problem

In semiconductor packaging, the unexpected drift of die pad positions during the die pick and placement process leads to challenges in achieving proper electrical connections, as traditional methods either enlarge feature dimensions, reducing I/O density and chip performance, or require direct-writing lithography tools that struggle to pattern redistributed metal layer (RDL) pads with physical masks.

Innovation Solution

A method and system that measure die pad shifts, calculate correction factors, and adjust via positions using maskless lithography tools, allowing for precise patterning of RDL pads without enlarging feature dimensions, while enabling mask-based lithography tools to correctly pattern RDL pads by shifting via positions between theoretical and actual die pad coordinates.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If traditional lithography methods are used to compensate for die pad position drift by enlarging feature dimensions, then electrical connection reliability is improved, but I/O density and chip performance deteriorate

Engineering Contradiction:
Improveelectrical connection reliabilityVSAvoidI/O density
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent replaces traditional mask-based lithography with a hybrid approach combining maskless lithography for via positioning and mask-based lithography for RDL pad patterning. This substitution eliminates the need to enlarge feature dimensions while maintaining electrical connection reliability, thereby preserving I/O density and chip performance

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The patent divides the lithography process into two distinct segments: maskless lithography for precise via location patterning and mask-based lithography for RDL pad patterning. This segmentation allows each process to be optimized independently, achieving both high positioning accuracy and maintained feature dimensions

Inventive Principle:
Principle #1Segmentation

2Manufacturing precision

If maskless lithography tools are used to pattern vias at shifted locations, then via positioning accuracy is improved, but the ability to pattern RDL pads with physical masks deteriorates

Engineering Contradiction:
Improvevia positioning accuracyVSAvoidRDL pad patterning capability
Core Design Contradiction:
Manufacturing precisionVSEase of manufacture

Solution Approach 1:

The patent segments the lithography workflow into two distinct operations: maskless lithography for via placement and mask-based lithography for RDL pad formation. This segmentation enables each tool type to perform its optimal function without compromising the other process

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces a computational intermediary that calculates correction factors based on die pad position measurements and uses these to adjust via coordinates. This intermediary layer bridges the gap between actual die pad positions and the lithography tool coordinate systems, enabling both maskless and mask-based tools to work effectively

Inventive Principle:
Principle #24Intermediary (Mediator)

3Manufacturing precision

If direct-writing lithography tools are used to compensate for die pad shifts, then positioning accuracy is improved, but device complexity increases

Engineering Contradiction:
Improvepositioning accuracyVSAvoidlithography system complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent divides the lithography system into two specialized components working in sequence: a maskless lithography tool for via positioning and a mask-based lithography tool for RDL pad patterning. This segmentation allows each component to remain relatively simple while achieving high overall positioning accuracy through coordinated operation

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS20240404893A1Apriori application with dynamic digital correction (DDC) function
Publication Date: 2024.12.05 APPLIED MATERIALS INC
  • US20240404893A1 patent drawing
  • US20240404893A1 patent drawing
  • US20240404893A1 patent drawing

AI summary

Embodiments of the present disclosure generally relate to lithography systems. In one embodiment, a method is disclosed. The method includes measuring a location of a die pad of a die placed on a substrate and determining a die pad shift between an expected location of the die pad and the measured location of the die pad. The method also includes using the determined die pad shift and an expected via location to generate a shifted via location for a via electrically connecting to the die pad. The method further includes patterning the via at the shifted via location with a maskless lithography tool and utilizing a physical mask with a mask-based lithography tool to pattern a redistribution layer (RDL) pad electrically connected to the via patterned at the shifted via location with the maskless lithography tool.