Dynamic Virtual Hierarchy Abstraction for Electronic Design Layout
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Solution Overview
Problem
Conventional electronic design processes face inefficiencies in creating hierarchical layouts, particularly in placement and routing, due to the need for manual estimation and alignment of pins and terminals, leading to misalignment issues and high computational resource consumption.
Innovation Solution
The method involves dynamically abstracting virtual hierarchies by identifying a portion of the layout and selecting figure groups at specific virtual hierarchies, allowing for the suppression of unnecessary design details and creating an abstracted layout that can be transformed between flat and hierarchical formats, with display stop levels controlling the level of detail displayed.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a hierarchical layout is generated with top-down or bottom-up approach, then the functional cells can be organized in proper hierarchy, but manual estimation and alignment of pins and terminals is required leading to misalignment issues and high computational resource consumption
Solution Approach 1:
The system performs preliminary actions by automatically generating pin and terminal locations based on functional connectivity information before the actual placement and routing processes. This preliminary generation of pin locations eliminates the need for manual estimation and alignment during iterative design cycles, reducing computational resource consumption while maintaining proper hierarchical organization.
Solution Approach 2:
The system enables self-service by allowing the electronic design automation tool to automatically determine pin and terminal locations based on functional connectivity data without requiring manual intervention. The system serves itself by using the available functional information to generate the physical layout details, eliminating the need for designer estimation and alignment operations.
2Productivity
If design details are suppressed to create abstracted layout, then manual effort is reduced and computational resources are optimized, but visibility of specific component details is lost
Solution Approach 1:
The system applies dynamics by enabling dynamic switching between abstracted and detailed views of the layout. Designers can adjust the level of abstraction based on the current design phase and needs, allowing the display to adapt between showing only high-level hierarchical structures and showing complete component details, thus reducing manual effort while preserving access to design details when needed.
Data Source
AI summary
Disclosed are methods, systems, and articles of manufacture for dynamically abstracting virtual hierarchies for an electronic design. These techniques identify at least a portion of a layout of an electronic design and a virtual hierarchy in the layout portion according to a value for a display stop level. A plurality of figure groups at one or more virtual hierarchies in the layout portion may also be identified in the layout portion. These techniques select a plurality of layout circuit component designs according to the virtual hierarchy. The layout portion may then be abstracted into an abstracted layout portion at least by displaying the plurality of layout circuit component designs and suppressing one or more remaining layout circuit component designs.