Dynamic Voltage Adjustment for IC Aging Compensation
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Solution Overview
Problem
Integrated circuits experience performance degradation over time due to aging-related failure mechanisms, leading to increased power consumption and reduced speed, necessitating a voltage margin that results in unnecessary high power usage at the beginning of life.
Innovation Solution
A system and method that periodically adjusts the supply voltage of an integrated circuit chip based on its age, using an age/voltage table to apply age-optimized voltages, ensuring optimal performance and power usage without a voltage margin, by incorporating an adjustable voltage regulator, age monitor, and voltage selector.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a voltage margin is used to account for aging effects, then reliability is improved, but power consumption increases
Solution Approach 1:
The patent implements dynamic voltage adjustment by transitioning from a static voltage margin approach to a dynamic aging-compensation mechanism. The system periodically measures actual circuit delay, compares it against timing requirements, and adjusts the supply voltage accordingly. This dynamic approach allows the voltage to be lowered when aging effects are minimal and raised only when necessary to meet timing targets, thereby reducing overall power consumption while maintaining reliability.
Solution Approach 2:
The patent changes the voltage parameter dynamically based on measured aging effects. Instead of using a fixed voltage margin that overcompensates for aging, the system continuously monitors circuit delay and adjusts the supply voltage to match the actual aging state. This parameter change strategy ensures that voltage is increased only to the extent necessary to maintain timing requirements, avoiding the excessive power consumption associated with static voltage margin approaches.
2Speed
If supply voltage is increased to compensate for aging, then speed is maintained, but power consumption increases
Solution Approach 1:
The patent applies partial voltage compensation rather than excessive voltage margin. The system measures actual delay degradation due to aging and increases voltage only to the extent necessary to meet timing requirements. This partial action approach avoids the excessive voltage application that would occur with traditional voltage margin methods, thereby maintaining circuit speed while minimizing additional power consumption.
3Reliability
If voltage margin is applied at beginning of life, then end-of-life reliability is ensured, but early power consumption is excessive
Solution Approach 1:
The patent implements a feedback mechanism that periodically measures circuit delay and uses this information to adjust voltage settings. The age monitor tracks operational time, and the delay measurement unit continuously assesses actual circuit performance. This feedback loop ensures that voltage is increased only when and where aging effects actually impact timing requirements, rather than applying a blanket voltage margin from the beginning of life. This resolves the contradiction by ensuring end-of-life reliability through targeted compensation while avoiding excessive power consumption during early operation.
Data Source
AI summary
Disclosed is a system that periodically increases the supply voltage applied to a power rail of an integrated circuit chip that is incorporated into a product, thereby compensating for age-dependent changes in a performance parameter sensitivity (e.g., in a delay sensitivity). In this system, the chip comprises at least a memory, an age monitor, a voltage selector and a power rail. The memory stores an age/voltage table. The age monitor automatically measures the age of the chip. Based on the age and using the age/voltage table, the voltage selector selects a specific supply voltage and outputs a voltage selection signal to an adjustable voltage regulator, which can apply (e.g., automatically or on-demand) that specific supply voltage to the power rail. Also disclosed is a method for regulating the power supplied to an integrated circuit chip, which is incorporated into a product, and a method for generating an age/voltage table.