Dynamic Voltage Control for Digital Logic Power Management
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Solution Overview
Problem
Portable devices like cell phones and PDAs face limited usage time due to rechargeable batteries, and existing power-saving methods often compromise device size, weight, and cost, necessitating efficient power management techniques.
Innovation Solution
A power controller that adjusts the voltage of the power signal supplied to digital logic circuits in response to changes in clock frequency, allowing for dynamic power mode changes between high and low power states, optimizing energy consumption based on frequency, temperature, and performance characteristics.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Duration of action of moving object
If battery size is increased to extend usage time, then duration of action is improved, but device size and weight increase
Solution Approach 1:
The patent changes the operating parameters of the digital logic circuit by dynamically adjusting voltage and frequency. The power controller modifies the voltage supplied to the circuit and synchronizes frequency changes to exploit the valley of susceptibility, reducing power consumption without requiring larger batteries. This allows extended usage time while maintaining compact device size and weight.
2Use of energy by moving object
If voltage is reduced to conserve power, then use of energy is improved, but reliability deteriorates
Solution Approach 1:
The patent implements dynamic voltage and frequency adjustment rather than static reduction. The power controller continuously monitors circuit operation and adjusts voltage levels in real-time based on operational needs. By synchronizing frequency changes with the valley of susceptibility, the system maintains reliability during voltage reduction, ensuring circuits remain functional while consuming less power.
Solution Approach 2:
The system employs feedback mechanisms where the power controller monitors the operational state of the digital logic circuit and adjusts voltage and frequency accordingly. This feedback loop ensures that voltage is reduced only when it safely maintains circuit functionality, preventing reliability degradation while achieving power conservation goals.
3Use of energy by moving object
If frequency is reduced to reduce power consumption, then use of energy is improved, but productivity deteriorates
Solution Approach 1:
The patent utilizes periodic action by synchronizing frequency changes with the valley of susceptibility - a periodic phenomenon in digital circuit operation. By timing frequency reductions to coincide with these natural susceptibility valleys, the system achieves power savings during specific operational phases while maintaining overall processing throughput. This periodic adjustment allows the circuit to operate more efficiently without permanently reducing productivity.
Data Source
AI summary
An electronic circuit comprises at least one digital logic circuit; and a power control circuit. The power control circuit is operable to adjust the voltage of a power signal supplied to the at least one digital logic circuit in response to a change in a clock frequency provided to the at least one digital logic circuit. In a further embodiment, the power controller is operable to increase the voltage of the power signal applied to the digital logic circuit before a frequency increase is made, and is operable to decrease the voltage of the power signal applied to the digital logic circuit after a frequency decrease is made.