Dynamic Voltage Control for Static Storage Leakage
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Solution Overview
Problem
As semiconductor devices shrink, transistor current leakage increases, requiring continuous power in sleep mode to prevent data loss, which contradicts the goal of power conservation, and heavier doping to control short channel effects exacerbates diode leakage, leading to inefficiencies in power management.
Innovation Solution
A static storage circuit with a mode voltage control circuit that dynamically adjusts the supply voltage between a retention voltage and a minimum voltage during sleep mode, using a leakage current measurement circuit to optimize power conservation by alternating between charge restoration and conservation phases, reducing overall power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If the supply voltage is lowered to reduce transistor current leakage during sleep mode, then power consumption is reduced, but diode leakage current increases significantly
Solution Approach 1:
The patent implements dynamic voltage adjustment by switching between a first voltage level (higher) and a second voltage level (lower) based on operational state. During active mode, the higher voltage ensures proper transistor operation and minimizes diode leakage. During sleep mode, the lower voltage reduces overall power consumption while the system accepts increased diode leakage as a temporary condition that will be corrected by subsequent charge restoration operations.
Solution Approach 2:
The patent employs periodic alternating operations between charge conservation mode and charge restoration mode. In charge conservation mode, the voltage is lowered to minimize power consumption despite increased diode leakage. In charge restoration mode, the voltage is raised to restore charges affected by diode leakage. This periodic alternation allows the system to tolerate temporary increases in diode leakage while maintaining data integrity over complete cycles.
2Reliability
If heavier doping is applied to control short channel effects in smaller devices, then sub-threshold current is limited, but diode leakage increases
Solution Approach 1:
The patent converts the harmful effect of increased diode leakage (caused by heavier doping) into a manageable parameter by implementing periodic charge restoration operations. The system allows diode leakage to occur during low-voltage sleep mode but then uses higher voltage restoration phases to replenish the charges lost to diode leakage, effectively converting the harmful leakage into a temporary condition that is corrected cyclically.
Solution Approach 2:
The patent changes the voltage parameter dynamically based on operational requirements. By switching between higher and lower voltage levels, the system adapts to the increased diode leakage caused by heavier doping, using higher voltage during restoration phases to compensate for leakage effects and lower voltage during sleep phases to reduce overall power consumption.
3Reliability
If continuous power is supplied during sleep mode to prevent data loss from transistor leakage, then data integrity is maintained, but power conservation goals are compromised
Solution Approach 1:
The patent implements dynamic voltage adjustment by switching between a first voltage level (higher) and a second voltage level (lower) based on operational state. During active mode, the higher voltage ensures proper transistor operation and minimizes diode leakage. During sleep mode, the lower voltage reduces overall power consumption while the system accepts increased diode leakage as a temporary condition that will be corrected by subsequent charge restoration operations.
Solution Approach 2:
The patent employs periodic alternating operations between charge conservation mode and charge restoration mode. In charge conservation mode, the voltage is lowered to minimize power consumption despite increased diode leakage. In charge restoration mode, the voltage is raised to restore charges affected by diode leakage. This periodic alternation allows the system to tolerate temporary increases in diode leakage while maintaining data integrity over complete cycles.
Data Source
AI summary
A circuit and method efficiently powers a static storage element during a low voltage mode of operation. The static storage element is powered at a first voltage level in an active mode of the static storage element. The static storage element is powered in a low power mode using alternating first and second phases. Powering the static storage element during the first phases in the low power mode includes powering the static storage element at or below a second voltage level, wherein powering the static storage element during the second phases in the low power mode includes powering the static storage element at a higher voltage level than the second voltage level. In another form two modes of low power operation are used where a first mode uses a less power efficient operation than the second mode, but both are more power efficient than a normal power mode.


