Dynamic Voltage-to-Delay Sampling Network for Fast Linear ADCs
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Solution Overview
Problem
Analog-to-digital converters, particularly those operating in the delay domain, face challenges in achieving high-speed operation with reduced area and power requirements while maintaining linearity and common mode rejection ratio.
Innovation Solution
A dynamic voltage-to-delay device with first and second voltage lines, a current source, and comparators that generate output signals representative of input signal differences, utilizing a clock signal to control the active and reset phases and dynamically adjust voltages to produce delay between output signals, thereby improving the efficiency and linearity of the conversion process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If traditional voltage-to-delay devices are used in analog-to-digital converters, then the conversion function can be achieved, but the converter requires more devices, increased area, and higher power consumption
Solution Approach 1:
The patent applies dynamics by making the threshold voltage time-varying rather than static. The threshold voltage dynamically changes during the conversion cycle, enabling faster conversion without requiring additional devices. This dynamic approach allows the same hardware to achieve higher productivity while maintaining low power consumption.
Solution Approach 2:
The patent changes the parameter of threshold voltage from a fixed value to a time-varying parameter. By modulating the threshold voltage parameter over time, the converter achieves faster operation and better linearity without increasing the number of devices, thereby reducing both area and power consumption while improving conversion speed.
2Measurement precision
If more voltage-to-delay devices are used to improve linearity, then conversion accuracy improves, but power consumption and area increase
Solution Approach 1:
The patent improves linearity by dynamically changing the threshold voltage parameter over time rather than using multiple static devices. This time-varying parameter approach achieves better measurement precision and linearity while using the same hardware resources, thereby reducing the required device area.
3Measurement precision
If more voltage-to-delay devices are used to improve conversion accuracy, then linearity improves, but power consumption increases
Solution Approach 1:
The patent achieves improved linearity through parameter changes in the threshold voltage over time, eliminating the need for additional power-consuming devices. The dynamic parameter modulation provides better measurement precision while maintaining low power consumption by reusing the same hardware resources.
4Productivity
If the threshold voltage is fixed, then the circuit is simple, but the conversion speed and linearity are limited
Solution Approach 1:
The patent resolves this contradiction by introducing dynamics to the threshold voltage, making it time-varying rather than fixed. This dynamic approach improves conversion speed and linearity while adding minimal complexity through clocked control, achieving better productivity with acceptable circuit complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution enables high-speed operation with reduced power consumption and improved linearity, allowing for fewer voltage-to-delay devices to be used, thus saving power and enhancing the overall voltage-to-delay function in analog-to-digital converters.
Implementation Method 1
a current source, connected to the first and second voltage lines, for increasing voltages on the voltage lines during active phases
Implementation Method 2
first and second comparators, connected to the first and second voltage lines, for generating first and second output signals during the active phases when the voltages on the voltage lines reach a threshold voltage
Data Source
AI summary
A dynamic voltage-to-delay device may have voltage lines for receiving input signals during reset phases, and a current source, connected to the first and second voltage lines, for increasing voltages on the voltage lines during active phases. The voltage-to-delay device may also have comparators, connected to the voltage lines, for generating first and second output signals during the active phases when the voltages on the voltage lines reach a threshold voltage, such that a delay between the output signals is representative of a difference between voltages of the input signals. The voltage-to-delay device may have at least two current sources. The comparators may have a tail node to which a voltage is applied during a reset phase, and a current source for reducing the voltage at the tail node, and thereby reducing a threshold voltage during an active phase.