Dynamic Voltage Drop Analysis Using Register Bus Complexity
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Solution Overview
Problem
Existing methods for dynamic voltage drop (DVD) mitigation in integrated circuits (ICs) face limitations in coverage, particularly in capturing simultaneous switching events and their impact on voltage drops, leading to potential performance degradation and reliability issues.
Innovation Solution
The proposed solution involves identifying register buses and evaluating the complexity of associated combinational logic paths to improve DVD analysis. This includes tracing fan-in and fan-out logic paths, marking gates with low complexity, and feeding them to a DVD analysis tool to enhance hotspot coverage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If vector-based DVD simulations are used, then computational complexity is reduced, but coverage of simultaneous switching events is insufficient
Solution Approach 1:
The patent applies preliminary action by pre-identifying register buses and their associated combinational logic paths before DVD analysis. By tracing fan-in and fan-out logic paths and evaluating their complexity in advance, the method prepares targeted groups of gates that are likely to switch simultaneously, ensuring these critical paths are captured in the DVD simulation without requiring exhaustive computational resources.
2Measurement precision
If Monte Carlo random stimulus techniques are used, then statistical significance is improved, but the number of cycles required increases significantly
Solution Approach 1:
The patent extracts and focuses on specific critical paths by identifying register buses and tracing their associated combinational logic. Instead of performing random stimulus on the entire design, the method extracts the relevant logic paths that are most likely to exhibit simultaneous switching, thereby achieving statistically significant DVD analysis with fewer simulation cycles.
3Reliability
If comprehensive bus identification and complexity evaluation are performed, then DVD hotspot coverage is improved, but analysis time increases
Solution Approach 1:
The patent applies local quality by differentiating between different regions of the design based on their DVD risk characteristics. By evaluating the complexity of combinational logic paths associated with specific register buses and applying complexity thresholds, the method identifies and focuses analysis on local regions (gate groups) that are most likely to be DVD hotspots, rather than uniformly analyzing the entire design.
Data Source
AI summary
An apparatus and method for analyzing dynamic voltage drops in an integrated circuit are disclosed. The method includes providing a gate-level netlist including registers and combinational gates; identifying a first register bus included in a plurality of register buses, the first register bus comprised of one or more of the registers included in the netlist; determining whether a complexity of a first group of combinational gates forming at least one timing path associated with a first bit in the first register bus is less than or equal to a first threshold; assigning the first group of combinational gates to a first group of cells; assigning the first group of cells into a first bus group associated with the first register bus in response to the complexity of the first group of combinational gates being less than or equal to the first threshold; and providing the first bus group to a dynamic voltage drop analysis tool.