Dynamic Voltage Frequency Scaling PUF Circuit Design
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Solution Overview
Problem
Circuit-delay based Physical Unclonable Functions (PUFs) face challenges with high power consumption and large area overhead, which hinders their effectiveness in identifying and securing integrated circuits against counterfeit chips.
Innovation Solution
Implementing dynamic voltage and frequency scaling in PUF circuits, allowing them to operate at varying supply voltage and frequency levels, thereby reducing power consumption and area requirements while maintaining security through increased sensitivity to semiconductor-level manufacturing variations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If circuit-delay based PUF circuits operate using static supply voltages and high operating frequencies, then they can provide sufficient signal strength and measurement accuracy, but they consume high power
Solution Approach 1:
The patent applies dynamic voltage and frequency scaling to the PUF circuit, allowing it to operate at multiple voltage and frequency levels rather than static values. The circuit can dynamically adjust its operating point based on measurement requirements, using higher voltages/frequencies only when measurement precision is critical and lower levels when power savings are prioritized.
Solution Approach 2:
The patent changes the operating parameters (voltage and frequency) of the PUF circuit to optimize the trade-off between measurement precision and power consumption. By implementing multiple operating modes with different voltage and frequency levels, the system can adapt parameters to achieve acceptable measurement accuracy while significantly reducing power consumption during normal operation.
2Reliability
If multiple replicated circuit units are used to generate sufficient identifier bits, then security and identification capability are improved, but circuit area overhead increases
Solution Approach 1:
The patent adds a new dimension to the PUF circuit design by introducing multiple voltage and frequency operating levels. Instead of increasing area through more replicated circuits, the invention extracts more identifier bits from the same circuit by measuring delays under different operating conditions, effectively utilizing the voltage-frequency dimension to increase output entropy.
Solution Approach 2:
The same PUF circuit structure serves multiple functions by operating at different voltage and frequency levels. A single circuit unit can generate multiple identifier bits by being measured under various operating conditions, making the circuit universal in its ability to provide both identification and security functions without requiring multiple dedicated circuit replicas.
3Reliability
If the PUF circuit operates at nominal or higher supply voltages, then circuit performance and signal strength are maintained, but power consumption increases
Solution Approach 1:
The patent implements dynamic voltage scaling where the PUF circuit can operate at nominal voltage for standard performance requirements and switch to higher voltages only when enhanced signal strength is needed. This dynamic adjustment allows the system to maintain reliability when necessary while minimizing power consumption during normal operations.
Solution Approach 2:
The patent changes the supply voltage parameter of the PUF circuit to create different performance tiers. By implementing multiple voltage levels (nominal and higher), the system can adjust the voltage parameter to match the specific performance requirements of each application, achieving acceptable circuit performance at lower power consumption for most cases.
Data Source
AI summary
One feature pertains to a method that includes implementing a Physical Unclonable Function (PUF) circuit, and obtaining a first set of output bits from the PUF circuit by operating the PUF circuit at a first supply voltage level and/or first frequency. Then, at least one of the first supply voltage level is changed to a second supply voltage level and/or the first frequency is changed to a second frequency, where the second supply voltage level and the second frequency are different than the first supply voltage level and the first frequency, respectively. A second set of output bits is then obtained by operating the PUF circuit at the second supply voltage level and/or the second frequency, where the second set of output bits is in part different than the first set. Secure data is generated using the first set of output bits and the second sets of output bits.