Dynamic Voltage Impact Simulation for Integrated Circuit Timing Accuracy
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Solution Overview
Problem
Current IC design simulations, particularly static timing analysis, are resource and time intensive and lack accuracy due to their inability to consider dynamic variations in power and ground signals, leading to unnecessary margin additions in IC designs to compensate for worst-case scenarios, which affects circuit performance and cost.
Innovation Solution
A system and method that identifies vulnerable cells in an integrated circuit layout by performing dynamic power and ground simulations, using a combination of static and dynamic analysis techniques to determine accurate slack levels and voltage sensitivities, thereby reducing the need for excessive margin adjustments.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If full dynamic simulation is performed on all IC cells, then simulation accuracy is improved, but simulation time and computational resources become prohibitive
Solution Approach 1:
The patent segments the IC design into multiple cells and identifies only those cells that are vulnerable to power/ground variations. Instead of simulating all cells dynamically, the method applies dynamic simulation only to the identified vulnerable subset, thereby maintaining accuracy where needed while reducing overall computational burden.
Solution Approach 2:
The patent applies different simulation qualities to different parts of the IC design. Vulnerable cells receive high-quality dynamic simulation with multiple power/ground levels, while non-vulnerable cells use lower-quality static timing analysis, optimizing the balance between accuracy and computational efficiency.
2Productivity
If static timing analysis is used for all cells, then simulation speed is improved, but accuracy deteriorates due to inability to consider dynamic power and ground signal variations
Solution Approach 1:
The patent introduces dynamic analysis capabilities into the timing simulation process by performing dynamic power and ground simulations on vulnerable cells. This allows the system to adaptively consider dynamic variations in power and ground signals where they matter most, while maintaining static analysis speed for the overall design.
Solution Approach 2:
The patent applies dynamic simulation partially - only to the extent necessary for accurate results. By identifying vulnerable cells and applying dynamic analysis only to those specific cells rather than the entire IC design, the method achieves the minimum necessary action to maintain accuracy while preserving overall simulation efficiency.
3Reliability
If excessive margin is added to compensate for worst-case scenarios, then reliability is improved, but circuit performance and cost deteriorate
Solution Approach 1:
The patent performs preliminary identification of vulnerable cells using static timing analysis with compressed rail representations before final timing closure. This preliminary action allows designers to focus margin adjustments only on identified vulnerable paths rather than applying excessive margin uniformly across the entire design, thereby improving reliability where needed while maintaining performance elsewhere.
Data Source
AI summary
Systems and methods are provided for simulating an integrated circuit system. A file representative of an integrated circuit layout is received, the integrated circuit layout including a plurality of cells and characteristics of power supply and ground paths to each cell. A vulnerable cell of the integrated circuit layout based on a vulnerability characteristic of the vulnerable cell. A power analysis of a portion of the integrated circuit layout is performed to determine a plurality of power and ground levels within a timing window for each of a plurality of cells including the vulnerable cell. A timing analysis of the vulnerable cell is performed, where the timing analysis receives a single power level and single ground level for the vulnerable cell and determines a slack level for the vulnerable cell. An at risk path is identified based on the vulnerable cell slack level, and a dynamic power/ground simulation of one or more cells in the at risk path is performed.