Dynamic Voltage Scaling Lookup Table for Integrated Circuits
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Solution Overview
Problem
Existing integrated circuits face inefficiencies in dynamic voltage scaling due to lookup tables created under worst-case conditions, leading to suboptimal power consumption in mobile electronic devices, as they do not account for varying power requirements and environmental changes.
Innovation Solution
A method for dynamically generating and updating lookup tables by testing system components within the integrated circuit while in operation, allowing for adjustments based on current power demands and environmental factors, thereby optimizing voltage scaling without the need for worst-case assumptions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If lookup tables are created based on worst-case timing conditions, then reliability is ensured, but power consumption cannot be reduced to the extent allowed by the chip's actual properties
Solution Approach 1:
The patent implements dynamic voltage scaling where the lookup table is not fixed but can be updated and adapted. The system dynamically adjusts voltage levels based on actual chip performance characteristics and operating conditions, allowing the lookup table to evolve from static worst-case based to dynamic performance-based, thereby reducing power consumption while maintaining reliability
Solution Approach 2:
The patent introduces feedback mechanisms where the actual performance of the chip is monitored and used to update the lookup table. By feeding back actual timing data and performance characteristics, the system can refine voltage scaling decisions and optimize power consumption based on real chip behavior rather than worst-case assumptions
2Use of energy by moving object
If dynamic voltage scaling is implemented with a lookup table, then power consumption is reduced, but the lookup table must be accurately determined which requires additional testing and characterization
Solution Approach 1:
The patent enables the chip to self-characterize and self-optimize its voltage scaling parameters. The chip performs its own timing analysis and performance evaluation without requiring external testing equipment, using built-in monitoring and measurement capabilities to generate the lookup table data, thereby reducing the complexity of external characterization processes
Solution Approach 2:
The patent performs preliminary timing analysis and characterization during chip manufacturing and initial operation to establish the lookup table before the chip enters normal service. This preliminary action captures critical timing data and performance characteristics early, eliminating the need for continuous external testing and characterization throughout the chip's lifecycle
3Adaptability or versatility
If the integrated circuit is tested while in operation, then adaptability to environmental changes is improved, but system components must be isolated which increases testing complexity
Solution Approach 1:
The patent segments the chip into separate testable modules and functional units that can be independently tested while the overall system remains operational. By dividing the chip into isolatable segments, the system can test individual components without shutting down the entire device, enabling adaptability testing while managing complexity through modular architecture
Data Source
AI summary
Method for ascertaining an operating range for an integrated circuit which has a plurality of system components, in which a test routine is performed for testing at least one system component from the plurality of system components, where the at least one system component is not in operation and at least one other untested system component from the plurality of system components is ready for operation when the at least one system component is tested.