Dynamic Word Line Voltage Boosting for Memory Write Stability

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Current semiconductor memory systems face challenges in achieving efficient power, performance, and stability tradeoffs under varying conditions, particularly due to high line resistance and instability in write and read operations, which are exacerbated by shrinking transistor dimensions and process variations.

Innovation Solution

A system management unit dynamically adjusts word line voltage levels in memory arrays by selecting between enabling and disabling voltage boosting based on a target operational voltage, using a cross-over region of operating voltages to prevent transistor damage and ensure stable operations, thereby optimizing power consumption and performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If voltage boosting is enabled to improve write operation stability, then write stability improves, but power consumption increases and transistor damage risk increases at high voltages

Engineering Contradiction:
Improvewrite operation stabilityVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent implements dynamic voltage boosting by enabling the boost function only when write operation instability is detected through retry logic. The system transitions from a static always-on boost approach to a dynamic conditional approach, activating voltage boosting only when needed based on operational feedback, thereby reducing unnecessary power consumption while maintaining write stability when required.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The system changes the voltage parameter dynamically by switching between boosted and unboosted states based on operational conditions. The word line voltage is adjusted from a fixed high level to a variable level that changes based on whether write operations succeed or fail, optimizing the balance between write stability and power consumption.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If voltage boosting is always enabled to ensure write stability, then write operation stability improves, but transistor damage risk increases due to excessive voltage levels

Engineering Contradiction:
Improvewrite operation stabilityVSAvoidtransistor damage risk
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent applies preliminary anti-action by implementing a safety mechanism that prevents excessive voltage application. The system monitors write operation success and only applies voltage boosting when failures occur, thereby avoiding the harmful effect of continuous high voltage exposure that could damage transistors, while still providing protection when write instability is detected.

Inventive Principle:
Principle #9Preliminary anti-action

Solution Approach 2:

The voltage boosting is made dynamic rather than static, allowing the system to adjust voltage levels based on real-time operational feedback. This prevents transistors from being subjected to unnecessary high voltage stress during normal operations while providing voltage boosting only when write failures indicate instability, thereby reducing transistor damage risk.

Inventive Principle:
Principle #15Dynamics

3Use of energy by moving object

If supply voltage is scaled down to reduce power consumption, then power consumption decreases, but write operation stability deteriorates due to insufficient voltage headroom

Engineering Contradiction:
Improvepower consumptionVSAvoidwrite operation stability
Core Design Contradiction:
Use of energy by moving objectVSReliability

Solution Approach 1:

The system performs preliminary detection of write operation success before taking corrective action. When a write operation fails, the system then applies voltage boosting as a remedial measure, allowing low voltage operation during successful writes while providing voltage support only when needed, thus maintaining power efficiency while ensuring write stability.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent implements dynamic voltage adjustment that allows the memory system to operate at low supply voltages during normal conditions to save power, while automatically activating voltage boosting when write operations fail, thereby achieving both low power consumption and write operation stability through adaptive voltage management.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS10366734B2Programmable write word line boost for low voltage memory operation
Publication Date: 2019.07.30 ADVANCED MICRO DEVICES INC
  • US10366734B2 patent drawing
  • US10366734B2 patent drawing
  • US10366734B2 patent drawing

AI summary

A system and method for efficient power, performance and stability tradeoffs of memory accesses under a variety of conditions are described. A system management unit in a computing system interfaces with a memory and a processing unit, and uses boosting of word line voltage levels in the memory to assist write operations. The computing system supports selecting one of multiple word line boost values, each with an associated cross-over region. A cross-over region is a range of operating voltages for the memory used for determining whether to enable or disable boosting of word line voltage levels in the memory. The system management unit selects between enabling and disabling the boosting of word line voltage levels based on a target operational voltage for the memory and the cross-over region prior to updating the operating parameters of the memory to include the target operational voltage.