Dynamic ZQ Calibration Circuit for Nonlinear Driver Impedance
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Solution Overview
Problem
Conventional semiconductor memory devices face challenges in achieving high-speed memory access due to non-linear impedance curves in driver circuits, which require inefficient adjustments to achieve desired impedance, leading to prolonged calibration times and non-uniform impedance changes.
Innovation Solution
A dynamic adder/subtractor circuit is introduced in the ZQ calibration circuit to dynamically adjust impedance code step sizes based on the current ZQCODE value, allowing for more efficient impedance calibration by varying increment and decrement step sizes, thereby reducing calibration time and achieving uniform impedance changes across different voltage levels.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If fixed step size adjustments are used for impedance calibration, then the calibration process is simple to implement, but the calibration time is prolonged and impedance changes are non-uniform
Solution Approach 1:
The patent applies dynamics by transitioning from fixed step size adjustments to dynamic step size adjustments in the impedance calibration process. The step size is adjusted based on the current impedance value and the target impedance, allowing larger steps when far from target and smaller steps when接近, thereby reducing overall calibration time while maintaining uniform impedance changes.
Solution Approach 2:
The patent changes the parameter of step size from a constant value to a variable value that adapts during calibration. By modifying the step size parameter dynamically based on calibration progress and impedance characteristics, the system achieves faster convergence without sacrificing implementation feasibility through programmable control logic.
2Device complexity
If fixed step size adjustments are used for impedance calibration, then the circuit design is simple, but the impedance changes are non-uniform across different voltage levels
Solution Approach 1:
The patent implements dynamic step size adjustment that adapts to different voltage levels and impedance regions. This ensures uniform impedance changes across the full range by automatically selecting appropriate step sizes for each operating condition, improving calibration precision without requiring complex hardware modifications beyond standard programmable logic.
Solution Approach 2:
The patent applies local quality by using different step sizes for different regions of the impedance curve. Rather than applying a uniform step size globally, the system tailors the step size to local characteristics of the impedance vs. voltage relationship, ensuring optimal precision at each operating point while maintaining overall system simplicity.
3Productivity
If larger step sizes are used for impedance code adjustments, then the calibration speed increases, but the impedance control precision decreases
Solution Approach 1:
The patent resolves this contradiction by making the step size dynamic rather than static. Large step sizes are used when the impedance is far from the target value to achieve fast convergence, while smaller step sizes are automatically selected when approaching the target to ensure precise control. This adaptive approach optimizes both calibration speed and precision throughout the calibration process.
Solution Approach 2:
The patent employs a periodic adjustment strategy where the step size is recalculated and updated at each calibration iteration based on current impedance measurements. This periodic reevaluation allows the system to switch between aggressive (large step) and fine-tuning (small step) modes appropriately, balancing speed and precision across different phases of calibration.
Data Source
AI summary
Methods and apparatuses are provided for dynamic step size for impedance calibration of a semiconductor device. An example apparatus includes a resistance calibration circuit configured to provide an impedance code to set impedance of a driver circuit. The resistance calibration circuit includes an adder/subtractor circuit configured to change the impedance code by a first step size responsive to the impedance code being less than a value to adjust the impedance of the driver circuit and further configured to change the impedance code by a second step size responsive to the impedance code greater or equal than the value to adjust the impedance of the driver circuit. The second step size is different from the first step size.