Dynamically Read Fuse Cell Using Time Domain Race Condition
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing methods for reading the state of programmable fuses are inefficient due to high current consumption and sensitivity to FET mismatches, particularly when scaled for large numbers of fuses.
Innovation Solution
A dynamically read fuse cell that utilizes a time domain race condition between two interconnected NAND gates, where the slew rates of outputs vary with reference and fuse resistances, allowing for low current consumption and reliable state determination without analog bias currents.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a known current is applied through the fuse to determine its state, then the fuse state can be read, but the current consumption becomes unacceptably high when replicated across large numbers of fuses
Solution Approach 1:
The patent applies dynamics by using dynamic slew rates instead of static voltage thresholds. The outputs of the NAND gates are made to transition at different speeds (slew rates) depending on the fuse resistance, allowing the faster transitioning output to win the race condition. This dynamic approach enables fuse state reading without requiring continuous high current through the fuse, thus reducing current consumption while maintaining reading accuracy.
Solution Approach 2:
The patent implements periodic action through the race condition mechanism. The read operation is triggered periodically by applying a read signal to the NAND gates, causing them to transition in a controlled sequence. This periodic triggering allows the fuse state to be read at specific moments without requiring continuous current flow, thereby reducing overall current consumption while maintaining reliable state detection.
2Reliability
If the voltage across the fuse is increased to improve reading reliability, then the fuse state can be determined more reliably, but the current consumption increases undesirably
Solution Approach 1:
The patent resolves this contradiction by using dynamic slew rates instead of increasing static voltage. The NAND gate outputs transition at different speeds based on the fuse resistance, creating a time-domain differentiation that improves reading reliability without requiring proportionally higher current. The faster transitioning output indicates the fuse state, achieving reliable reading with controlled current.
Solution Approach 2:
The patent applies dimensionality change by moving the comparison from the voltage domain to the time domain. Instead of comparing voltage levels (which requires high current), the patent compares the time characteristics (slew rates) of the NAND gate outputs. This temporal dimension allows reliable fuse state differentiation with significantly reduced current consumption.
3Measurement precision
If current mirrors and logic gates are used to compare fuse resistance with reference resistance, then fuse state can be determined, but the cell becomes sensitive to mismatches between FET voltages
Solution Approach 1:
The patent replaces the voltage-based comparison mechanism (current mirrors and logic gates sensitive to Vgs mismatches) with a time-based race condition mechanism. Instead of comparing voltage levels that are sensitive to FET mismatches, the patent compares the time characteristics (slew rates) of NAND gate outputs, which are less sensitive to such mismatches. This substitution maintains measurement precision while improving reliability.
Solution Approach 2:
The patent applies parameter changes by shifting the comparison parameter from voltage (Vgs) to time (slew rate). The NAND gate outputs are designed to transition at different times based on the fuse resistance, creating a time-domain comparison that is less sensitive to FET voltage mismatches. This parameter transformation maintains the ability to distinguish fuse states while reducing sensitivity to manufacturing variations.
Data Source
AI summary
A dynamically read fuse cell includes a first circuit which includes a known reference resistance Rref, and a second circuit which includes a programmed fuse having a resistance Rfuse; the state of the programmed fuse is to be read. The first and second circuits receive a common “read” signal, and are arranged to produce first and second outputs which begin changing state in response; the first and second outputs have respective slew rates which vary with Rref and Rfuse, respectively. The first and second circuits are interconnected such that causing both outputs to begin changing state in response to the “read” signal triggers a time domain race condition, the result of which indicates which of the outputs slewed more quickly in response to the “read” signal, thereby indicating the relationship between Rref and Rfuse and, when Rref is properly chosen, the state of the fuse.